Student Research Symposium
31st IEEE International Conference on High Performance Computing, Data, & Analytics
Overview of Student Research Symposium (SRS) @ HiPC 2024
HiPC 2024 will feature the 16th Student Research Symposium (SRS) on High-Performance Computing, Data, and Analytics (HPC), aimed at stimulating and fostering student research and providing an international forum to highlight student research accomplishments. The symposium will be an integrated part of the main HiPC conference aiming to expose students to the best practices in HPC in academia and industry.
The symposium will feature student posters and provide students with other enriching experiences, such as workshops, industry exhibits, and demos. In 2024, SRS will comprise mentoring sessions, a special keynote speech, an expert panel discussion, and lightning talks. The Conference Reception and multiple Student Symposium Poster Exhibit sessions will allow students to interact with HPC researchers and practitioners (and recruiters) from academia and industry.
HiPC will provide limited travel support to one author of selected posters. Awards for Best Poster will be presented at the symposium. An online book containing the resumes of the students participating in the symposium will be compiled and made available to the sponsors of the HiPC 2024 conference to be held between Dec 18th and 21st in Bengaluru, India.
List of Accepted Papers
1. Hide Mastermind using an Intermediate Connection on a Social Network; Animesh Dutta (NIT Durgapur), Amrita Namtirtha (NIT Durgapur), Nilanjana Saha (NIT Durgapur)
2. A Cluster-Based Sampler for Fast GNN; Vishwesh Jatala (IIT Bhilai), Kishan Tamboli (IIT Bhilai), Surendra Kumar Raut (IIT Bhilai)
3. Combining Checkpoint/Restart and Replication for Fault Tolerance with High Performance; Sarthak Joshi (Indian Institute of Science), Sathish Vadhiyar (Indian Institute of Science)
4. CaH2:Criticality aware Hybrid L2; Rajshekar Kalayappan (Indian Institute of Technology Dharwad), Shruthi Karunakar (Indian Institute of Technology Dharwad)
5. Hybrid Performance Prediction Model for Edge Devices; Gargi Alavani Prabhu (BITS Pilani K. K. Birla Goa Campus), Param Gandhi (BITS Pilani K. K. Birla Goa Campus), Ishaan Thakkar (BITS Pilani K. K. Birla Goa Campus), Mahatva Garg (BITS Pilani K. K. Birla Goa Campus)
6. Collaborative Vying in Proof of Useful Work; Twinkle Kumari (Banaras Hindu University), Gaurav Baranwal (Banaras Hindu University)
7. Keeping GPUs Cool: GPU Temperature Prediction Using LSTM; Gargi Alavani Prabhu (Birla Institute of Technology & Science, Pilani, K K Birla Goa Campus), Jainam Shah (Birla Institute of Technology & Science, Pilani, K K Birla Goa Campus), Tanish Desai (Birla Institute of Technology & Science, Pilani, K K Birla Goa Campus)
8. RPM: Reward Power Manager for Power Distribution over a Cluster; Sridutt Bhalachandra (IIIT Delhi), Sunil Kumar (IIIT Delhi), Vivek Kumar (IIIT Delhi)
9. LiveWay: Dynamic Write Bypassing for Lifetime Enhancement in STT-RAM LLC; Prabuddha Sinha (Indian Institute of Technology, Ropar)
10. Exploring Efficient BCD to Binary Conversion Architecture Alternatives on FPGA; Ayan Palchaudhuri (Indian Institute of Technology Bhubaneswar), Santosh Kumar (Indian Institute of Technology Bhubaneswar)
11. Improving Parallel Exhaustive Subgroup Discovery with Early Search Space Pruning [paper173]; Sriram Kailasam (Indian Institute of Technology Mandi), Jyoti Jangra (Indian Institute of Technology Mandi), Ashutosh Litoriya (Indian Institute of Technology Mandi), Jyoti . (Indian Institute of Technology Mandi)
12. Identifying Focus-of-Analysis Regions in MPI-Traces Using Transfer-Efficiency Monitors; Kingshuk Haldar (High Performance Computing Center Stuttgart (HLRS), University of Stuttgart)
13. LOSM: Leveraging OpenMP and Shared Memory for Accelerating Blocking MPI Allreduce; Pranjal Walia (International Institute of Information Technology Bangalore), Uma Maheshwari Natarajan (International Institute of Information Technology Bangalore), Karthikeyan Vaidyanathan (International Institute of Information Technology Bangalore), Dhiraj D. Kalamkar (International Institute of Information Technology Bangalore), Ishan Shanware (International Institute of Information Technology Bangalore)
14. Efficient Parallel Algorithms For Exact SimRank Computations; Prajjwal Nijhara (Indian Institute of Technology, Jodhpur), Aditya Mundhara (Indian Institute of Technology, Jodhpur), Dip Sankar Banerjee (Indian Institute of Technology, Jodhpur)
15. Evaluating the Influence of Graph Characteristics on Parallel Algorithms for Derived Graph Structures; Maulein Pathak (Department of Computer Science, University of Delhi), Samarth Kapila( University Of British Columbia), Yogish Sabharwal (IBM Research India) , Neelima Gupta (Department of Computer Science, University of Delhi)
16. Balanced and Efficient Distribution of Coarse and Nested Grids in Regional Ocean Modeling System; Chaitanya V Patil (Indian Institute of Science, Bengaluru), Vinayachandran PN (Indian Institute of Science, Bengaluru), Sathish Vadhiyar (Indian Institute of Science, Bengaluru)
17. Dynamic Real-Time Scheduling on Distributed Hierarchical Fog Networks; Nitin Auluck (IIT Ropar), Amit Sharma (IIT Ropar)
18. Towards Platform-aware Application of Qubit Reuse in Hybrid Quantum-Classical Workflows; Shikhar Srivastava (Indian Institute of Science, Bangalore), Mridulanka Nath (Indian Institute of Science, Bangalore), Tarun Pal (Indian Institute of Science, Bangalore), Vaishnav Manoj (Indian Institute of Science, Bangalore), Ritajit Majumdar (IBM Quantum, IBM India Research Lab), Padmanabha Venkatagiri Seshadri (IBM Research, India), Anupama Ray (IBM Quantum, IBM India Research Lab) and Yogesh Simmhan (Indian Institute of Science, Bangalore)
19. Performance = Implementation + Hardware + Input Data, with application to SpMV; Shrirang Karandikar (MKSSS’s Cummins College of Engineering for Women), Khushboo Chaudhari (MKSSS’s Cummins College of Engineering for Women), Sneha Thombre (MKSSS’s Cummins College of Engineering for Women)
20. Fast Combinatorial Algorithm for Enhancing Long-read Sequencing Accuracy; Parvesh Barak (Indian Institute of Science, Banglore), Bikram Kumar Panda (Indian Institute of Science, Banglore), Chirag Jain (Indian Institute of Science, Banglore)
21. SimRank on Data Streams; Prajjwal Nijhara (Indian Institute of Technology Jodhpur), Huzefa Aiyub Ansari (Indian Institute of Technology Jodhpur), Dhyan Yajnik (Indian Institute of Technology Jodhpur), Dip Sankar Banerjee (Indian Institute of Technology Jodhpur)
22. Fast MIS on Incremental Graphs; Prajjwal Nijhara (Indian Institute of Technology, Jodhpur), Aditya Trivedi (Indian Institute of Technology, Jodhpur), Dip Sankar Banerjee (Indian Institute of Technology, Jodhpur)
23. Building a portable parallel asynchronous PDE solver using Kokkos; Konduri Aditya (Manipal Institute of Technology), Ranjan Bhat (Manipal Institute of Technology)
24. Accelerated Multilevel Graph Partitioning on GPUs; Bhakti Dhorajiya (IIT Bhilai), Vishwesh Jatala (IIT Bhilai), Amitesh Singh (IIT Bhilai)
25. Asynchrony-Tolerant Schemes to Enhance Scalability of High-Order Compressible Flow Solver; Aswin Kumar A (Indian Institute of Technology Madras), Konduri Aditya (Indian Institute of Technology Madras), Nagabhushana Rao Vadlamani (Indian Institute of Technology Madras)
26. A GPU-based Method for Finding Optimal Solution to the Set Covering Problem; Girish Biswas (JADAVPUR UNIVERSITY), Nandini Mukherjee (JADAVPUR UNIVERSITY)
27. Performance Analysis of Weighted Victim Cache Replacement Policy; Kartik Niranjan Patel (Indian Institute of Information Technology, Sricity, Chittoor), Virendra Yadav (Indian Institute of Information Technology, Sricity, Chittoor), Bheemappa Halavar (Indian Institute of Information Technology, Sricity, Chittoor), Uday Kiran Karra (Indian Institute of Information Technology, Sricity, Chittoor)
28. EvolvGraph: A Tool for Property-Constrained Generation of Dynamic Graphs; Subhajit Sahu (IIIT Hyderabad), Karan Nijhawan (IIIT Hyderabad), Kishore Kothapalli (IIIT Hyderabad), Rajendraprasad Saravanan (IIIT Hyderabad)
29. A Comparative Study of Spatio-Temporal Segmentation Performance: AWS g4dn.xlarge vs. Google Colab T4 GPU; Kumar Rajamani (Indian Institute of Technology, Kanpur), Swaroop Srisailam (Indian Institute of Technology, Kanpur), Pallab Mandal (Indian Institute of Technology, Kanpur), Praveen Pankajakshan (Indian Institute of Technology, Kanpur)
30. AI-Driven Power Gating for Enhanced Energy Efficiency in Superscalar Processors; Jaynarayan T Tudu (Indian Institute of Technology, Tirupati), Naman Kalra (Indian Institute of Technology, Tirupati)
31. Towards a Generalized SDK for a Programmable Drones-as-a-Service; Suman Raj (Indian Institute of Science, Bangalore), Rajdeep Singh (Indian Institute of Science, Bangalore), Kautuk Astu (Indian Institute of Science, Bangalore), Yogesh Simmhan (Indian Institute of Science, Bangalore)
33. A Novel Hybrid Cache Replacement Algorithm Combining Random and V-Way Strategies; Vrushank Ahire (Indian Institute of Technology Ropar), Aniruddh Muley (Indian Institute of Technology Ropar), Abhinandan S Prasad (Indian Institute of Technology Ropar), Pranav Menon (Indian Institute of Technology Ropar)
34. Hierarchical Communication Optimization for Distributed DNN Training; Preeti Malakar (Indian Institute of Technology Kanpur), Om Shivam Verma (Indian Institute of Technology Kanpur)
35. HiRTO: High-Reliable Task Offloading Scheme using Markovian Stackelberg Game Theory; Rajasekhar Dasari (Indian Institute of Information Technology, Design and Manufacturing, Kancheepuram), Sanjeet Kumar Nayak (Indian Institute of Information Technology, Design and Manufacturing, Kancheepuram)
36. A Partitioning Scheme for Large Scale Clique Counting on Single GPU; Shivangi Gaur (IIT Bhilai), Vinayak Kesarwani (IIT Bhilai), Vishwesh Jatala (IIT Bhilai), Sudeep Ranjan Sahoo (IIT Bhilai), Kishan Tamboli (IIT Bhilai)
37. Strategies for efficient GPU acceleration of a high-order 3D LES solver using OpenACC; Yash Phirke (Indian Institute of Technology Kanpur), Rajesh Ranjan (Indian Institute of Technology Kanpur)
38. Understanding Infrastructure Drift in Federated Learning Systems; Shashank Rana (BITS Pilani, KK Birla Goa Campus), Ayush Bhardwaj (BITS Pilani, KK Birla Goa Campus), Aishwarya Jayashankar (BITS Pilani, KK Birla Goa Campus), Vimarsh Shah (BITS Pilani, KK Birla Goa Campus), Arnab K. Paul (BITS Pilani, KK Birla Goa Campus)
39. Performance Trade-offs in GNN Inference: A Study on Hardware and Sampling Configurations; Pranjal Naman (Indian Institute of Science), Yogesh Simmhan (Indian Institute of Science)
40. Protocol for Trustful Data Consumption from Data Repositories by Workflow Engines; Shiva Sai Krishna Anand Tokal (Indian Institute of Science, Bangalore), Srinath Perera (WSO2, Sri Lanka), Yogesh Simmhan (Indian Institute of Science, Bangalore)
41. Towards Pre-Training Data Evaluation for Client Selection in Federated Learning; Vijay Dharmaji (Birla Institute of Technology and Science, Pilani, K.K. Birla Goa Campus), Manit Tanwar (Birla Institute of Technology and Science, Pilani, K.K. Birla Goa Campus), Subroto Majumder (Birla Institute of Technology and Science, Pilani, K.K. Birla Goa Campus), M. Mustafa Rafique (Rochester Institute of Technology, Rochester, USA), Arnab K. Paul (Birla Institute of Technology and Science, Pilani, K.K. Birla Goa Campus)
42. Development of a Visualization Surrogate Model for Time-varying Numerical Simulations; Tomoya Miyake (Kobe University), Naohisa Sakamoto (Kobe University)
43. Evaluating Multi-Instance DNN Inferencing on Multiple Accelerators of an Edge Device; Mumuksh Tayal (Indian Institute of Science), Yogesh Simmhan (Indian Institute of Science)
44. An Analysis of the Performance of LLM Inference on Edge Accelerators; Mayank Arya (Indian Institute of Science), Yogesh Simmhan (Indian Institute of Science)
45. Towards Optimizing Hyperledger-Fabric Performance Through Strategic Waiting; Divya Pulivarthi (Indian Institute of Science, Bangalore), Eshwar S R (Indian Institute of Science, Bangalore), Gugan Thoppe (Indian Institute of Science, Bangalore), Kshitij Pratihast (National Payments Corporation of India (NPCI)), Pavan Sollu (National Payments Corporation of India (NPCI)), Tittu Varghese (National Payments Corporation of India (NPCI)), Hrishikesh Nashikkar (National Payments Corporation of India (NPCI)), Yogesh Simmhan (Indian Institute of Science, Bangalore)
46. Kernel Bypass and user space network frameworks for High Performance Computing Workloads; Chirag Modi (IIT Gandhinagar), Sameer Kulkarni (IIT Gandhinagar)
47. Energy Efficient Predictive Beamforming and 5G Cell Management using SDN; Chirag Modi (IIT Gandhinagar), Sameer Kulkarni (IIT Gandhinagar), Ayushman Singh (IIT Gandhinagar), Aman Gupta (IIT Gandhinagar)
SRS Schedule
| Day | Time | Event |
|---|---|---|
| Day 1 (December 18) | 6:15 PM – 7:15 PM | SRS Keynote |
| Day 2 (December 19) | 12:30 PM – 1:45 PM (Lunchtime) | SRS Mentor-Mentee Session |
| Day 2 (December 19) | 6:30 PM – 7:30 PM | SRS Expert Panel Discussion |
| Day 3 (December 20) | 12 PM – 1:15 PM (Lunchtime) | SRS Career Panel |
| Day 4 (December 21) | 3:30 PM – 5:15 PM | SRS Lightning Talks |
| Day 4 (December 21) | 5:15 PM – 6 PM | SRS Introspection and Travel Grant Distribution |
| Day 4 (December 21) | 6 PM – 8 PM | SRS Poster Session |
Call for Papers
Papers are solicited in all areas of high-performance computing, data, and analytics, including but not limited to the topics mentioned in the HiPC Call for Papers.
IMPORTANT DATES:
Submissions open: Aug 26, 2024, AOE
Submission Deadline: Sep 30, 2024 Oct 10, 2024, AOE
Accept/Reject Decision Notification: Nov 8, 2024, AOE
Camera-ready Deadline for the Abstract of Accepted Posters: Nov 15, 2024, AOE
Symposium: Dec 18-21, 2024
ELIGIBILITY:
Submissions should have at least one student author during any part of the calendar year 2024. Submissions may have multiple student or non-student co-authors. Submissions must mark student authors with an asterisk (*). Student authors should also specify the degree they are pursuing.
SUBMISSION INSTRUCTIONS:
In order to be considered for a poster at the Student Research Symposium, authors must submit papers not exceeding two (2) single-spaced double-column pages (including references) using 10-point size font on 8.5×11-inch pages, with 1” margins on all sides (IEEE conference style). The IEEE conference style templates for MS Word and LaTeX provided by IEEE eXpress Conference Publishing are available for download. See the latest versions here.
Papers are to be submitted online in PDF format through https://ssl.linklings.net/conferences/HiPC/.
During submission, it needs to be marked whether the lead author is an undergraduate (B.E./B.Tech.), a postgraduate (M.E./M.Tech.) or a Ph.D. student.
A signed letter from the academic advisor needs to be submitted which states that “the submitted work is original and the work is done by the student.”
The poster authors are encouraged to follow the following format for the two-page submission.
(1) Introduction (0.5 page): Answer the following in separate paragraphs.
- Motivation. Clearly state the objective of the paper and motivate the specific problem your work is solving.
- Limitation of the state-of-art approaches. Briefly review the most relevant and most recent prior works. Clearly articulate the limitations of prior works and how your approach breaks away from those limitations.
- Key insights and contributions. Briefly articulate the major insights that enable your approach. Clearly specify the novelty of these insights and how they advance state-of-the-art.
- Limitations of the proposed approach. Clearly articulate the limitations of the proposed approach and identify avenues of future work.
(2) Design (0.5 page): Explain the overall design of your work with a brief explanation of the major components. It is better to include a small figure.
(3) Evaluation (0.5 page): Explain the testbed and include the major experimental results with graphs (if applicable).
(4) Conclusion and Future Work (0.3 page): Derive major conclusions of your work and specify future directions of the research.
(5) References (0.2 page): 4-5 major references for the work cited in the paper.
HiPC 2023 Student Research Symposium proceedings can be found here.
Disclaimer: For people without IEEE access, some sample 2-page posters are provided below which were accepted in HiPC2023.
A two-page abstract of the selected posters will be published in the HiPC Workshop proceedings in IEEE Xplore. This will provide students with the flexibility to publish an extended version of their paper at other venues after benefiting from reviewer feedback. The papers are reviewed by at least three independent reviewers. Papers will be judged on technical merit, quality, relevance to the symposium, and related parameters. Plagiarism is prohibited in any form, especially verbatim reproduction from other published works. Plagiarized papers will be rejected, and the corresponding department and institution will be notified.
As per IEEE guidelines, the use of artificial intelligence (AI)–generated text in an article needs to be disclosed in the acknowledgements section of any submitted paper. The sections of the paper that use AI-generated text should have a citation to the AI system used to generate the text. For more information, please click here.
Facilities for displaying posters will be made available, and the exact specifications of the poster size will be provided later. At least one student author of each accepted paper must register and attend the conference to present their work. Papers with no- shows will be retroactively rejected.
TRAVEL SUPPORT:
HiPC will provide a limited travel scholarship to at least one student author of each accepted submission from an Indian university. There may be a small number of travel scholarships for international student authors. This scholarship will cover partial expenses for attending the conference. To get reimbursement of travel support, SRS organizers expect the selected students to attend the entire conference along with the SRS-specific activities. Further details on this scholarship and the application process will be provided later.
MENTORING SESSION:
Mentoring will be organized for the students selected for SRS, where the students will get an opportunity to meet senior researchers attending the HiPC conference. These mentoring sessions include a panel of experts providing their experiences in research and a lunch where a mentor will be matched with students. More mentoring opportunities are being planned for SRS students to get guidance in the world of R&D in high-performance computing.
SYMPOSIUM CO-CHAIRS:
Abhinandan S Prasad, Indian Institute of Technology Ropar, India
Konduri Aditya, Indian Institute of Science, India
Contact: <student_symposium at hipc dot org> for more details.
PC Members:
1. Dip Sankar Banerjee, IIT Jodhpur
2. Vivek Kumar, IIIT Delhi
3. Nikhil Hegde, IIT Dharwad
4. Konduri Aditya, Indian Institute of Science
5. Abhinandan S.P., IIT Ropar
6. M. Mustafa Rafique, Rochester Institute of Technology
7. Nitin Auluck, IIT Ropar
8. Chirag Jain, IISc
9. Sanket Tavarageri, Microsoft
10. Jean Luca Bez, Lawrence Berkeley National Laboratory
11. Neeraj Goel, IIT Ropar
12. John Jose, IIT Guhwati
13. Sameer Kulkarni, IIT Gandhinagar
14. Komal Kumari, Dassault Systemes Simulia Corp
15. Phani Motamarri, IISC
16. Sarah Neuwirth, Johannes Gutenberg University Mainz
17. Nagabhushana Rao Vadlamani, IIT Madras
18. Niranjan S. Ghaisas, IIT Hyderabad
19. Venkata Kalyan Tavva, IIT Ropar
HiPC 2024 is the 31st edition of the IEEE International Conference on High Performance Computing, Data, and Analytics. It will be an in-person event in Bengaluru, India, from December 18 to December 21, 2024.
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Diversity and Inclusion
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