Sponsors Session

Sponsors Session is scheduled in two slots as follows:
Dec 19:  10:30 AM - 1:00 PM (Majestic)
Dec 20:  10:00 AM - 11:00 AM (Majestic)

Speaking slots for various support levels is as follows:
Titanium:  30 minutes
Platinum:  20 minutes
Gold:  10 minutes

Speaking schedule

19th Dec, Slot 10.30-13.00
10.30-11.00:  nVidia
11.00-11.20:  Fujitsu
11.20-11.40:  Mellanox
11.40-11.50:  Ansys
11.50-12.00:  Arista
12.00-12.10:  Boston
12.10-12.20:  DDN
12.20-12.30:  EMC
12.30-12.40:  Intel

20th Dec, Slot 10.00-11.00
10.00-10.10:  Google
10.10-10.20:  NetApp
10.20-10.30:  Panasas
10.30-10.40:  Wipro
10.40 - 10.50:  TCS

Speakers

Panasas: Brent Welch, Chief Technology Officer.
Brent Welch is Chief Technology Officer at Panasas. Panasas has developed a scalable, high-performance, object-based parallel file system that is used in a variety of HPC environments, including many of the Top500 super computers. He has worked at Xerox-PARC and Sun Microsystems Laboratories. Brent has experience building software systems from the device driver level up through network servers, user applications, and graphical user interfaces. While getting his PhD at UC Berkeley, he designed and built the Sprite distributed file system. Brent is the creator of the TclHttpd web server, the exmh email user interface, and the author of Practical Programming in Tcl and Tk. Brentparticipates in the NFSv4 working group, and is co-author of the pNFS internet drafts that specify parallel I/O extensions for NFSv4.

NVIDIA: Dr.Steve Scott, CTO Tesla business, NVIDIA Corporation
Title: "Enabling Exascale with GPU Computing"
Dr. Steve Scott is Chief Technology Officer of the Tesla business unit at NVIDIA, where he is responsible for the evolution of NVIDIA's GPU computing roadmap. Prior to joining NVIDIA in August 2011, Steve spent 19 years at Cray, where he was CTO since 2004. He was the Chief Architect of multiple systems at Cray, architected the routers for the Cray XT, XE and Cascade systems, and led the Cray Cascade project funded by the DARPA High Productivity Computing Systems program. Steve holds twenty-eight US patents, and has served on numerous advisory boards and program committees. He was the recipient of the 2005 ACM Maurice Wilkes Award and the 2005 IEEE Seymour Cray Computer Engineering Award. He received his PhD in computer architecture in 1992 from the University of Wisconsin at Madison, where he was a Wisconsin Alumni Research Foundation and Hertz Foundation Fellow.

Boston: David Power
David Power heads up the High Performance Computing division at Boston Ltd. He joined Boston recently with over 10 years of experience deploying, tuning and developing on clusters. David conducted his research with the Bio-computing and Developmental Systems (BDS) group at the University of Limerick where his main interests included Distributed Genetic Algorithms (DGAs) and Grammatical Evolution (libGE). David specialises in developing industry leading HPC solutions as well as HPC deployments and integration, where he has been responsible for large scale complex technical projects encompassing a variety of HPC products and applications.