Selected Posters and Instructions
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Letter from the Poster/Presentation Chair to authors of selected posters
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Dear Author:
Congratulations!
I am pleased to inform you that your POSTER paper has been accepted for
presentation at the:
HiPC 2004: International Conference on High Performance Computing
Bangalore, India - http://www.hipc.org/
The poster session offer a brief presentation time (2-3 minutes) for
each poster and will be followed by a "walk-up and talk" setting. For
full details on poster format and preparation etc are enclosed below.
Online Proceedings: I would like to you update the poster and send me
final version of poster during
Nov 25-28,2004 (I am on travel at other times) so that I can prepare a
online proceedings for placing on the web.
I look forward meeting you all in Bangalore.
Best wishes
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Dr. Rajkumar Buyya
Senior Lecturer and StorageTek (USA) Fellow of Grid Computing
Grid Computing and Distributed Systems (GRIDS) Lab: http://gridbus.org
Dept. of Computer Science and Software Engineering
The University of Melbourne
ICT Building, 111, Barry Street,
Carlton, Melbourne, VIC 3053, Australia
URL: http://www.buyya.com | http://www.gridbus.org/~raj
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Poster Format and Presentation Instructions
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Poster Paper Content: Feel free to use your own format, but make sure
that your poster paper has all the elements of a research paper. It must
contain sufficient details related to: (a) problem definition/motivation,
(b) new idea/contribution, (c) architecture, (d) implementation,
(e) experimentation and performance evaluation, (f) related work, and
(g) references and all need to cited in the paper. Please email
PDF version of your paper to the poster chair.
Brief Talk: Since the time allocated for each poster talk is 3 minutes, you
should prepare maximum 3 transparencies/slides and present it using the overhead
projector. This basically provides you an opportunity to attract the right
audience who can come and visit your poster to discuss your work further.
Actual Poster Format: The HiPC conference will provide a "2 ft by 3ft" poster board
for displaying your poster. Please prepare your poster whose size is slightly
smaller than the poster board. Here you will have sufficient time to explain your
work to interested attendees on a one-to-one basis. It is not acceptable to
display your paper as a poster. Be creative to convince your idea and follow
format that you think is the best - use your own style, format, fonts, color, diagrams,
etc. for preparing poster. Pls make sure that your poster content is clearly visible
from one meter distance (at least).
Poster Awards: In the past HiPC conference has offered two awards for authors of best
posters/presentations. It is likely that HiPC will be offering such awards this year
and if so, it will be confirmed during the poster session!.
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1. Best Presentation award
Each poster author will get only 3 minute for presentation.
[Those exceed beyond 3 minutes will not be considered for award.]
2. Best Poster award.
This will focus on originality of the work and also originality of look and feel.
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Qualification: We are restricting these awards primarily to posters whose primary author
and presenter is a student -- of course you can have one or more students or non-students
as your co-authors. The awards will be announced and presented during the conference banquet.
All poster speakers are expected to register for the conference. Please see the
HiPC web site for more information on this.
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HiPC Posters Web Proceedings
1. Soft Enforcement of Access Control Policies in Distributed Environments
Vipul Goyal (Banaras Hindu University, Varanasi, India)
Email: [email protected]
2. FPGA-BASED HIGH-PERFORMANCE COMPUTING FOR HAPTIC SIMULATION IN A VIRTUAL ENVIRONMENT
Rohan F. Rebello, Sriram S (Anna University, Chennai, India)
[email protected], [email protected]
3. A novel transistor level implementation of a high speed packet switch
Dr.A.Shanmugam (Bannari Amman Institute of Technology and Science, Coimbatore, India)
G.Shanthi & Praveenkumar (PSG College of Technology, Coimbatore, India)
Email: [email protected]
4. High performance VLSI implementation of the block cipher Rijndael algorithm
Mrs.G.Umamaheswari and Dr.A.Shanmugam (PSG College of technology, Coimbatore)
Email:[email protected]
5. Design representation and transformation for High level synthesis in resource constrained system
M. Sangeetha. Tharini, J. Raja Paul Perinbam (Anna University)
Email: [email protected]
6. Self-organising Mobile Agent Based Proxies for Web Digital Libraries
R.Ponnusamy and T.V.Gopal (Anna University)
Email: [email protected]
7. INTERNET PROTOCOL (IP) BLACK HOLES
C.S. Krishnadev and Prashant (Institute of Technology &Management, Gwalior)
E-mail: [email protected]
8. VoIP - innovative uses in small Telex
Pranav Kumar and Abhay Kumar Jha (Indian Institute of Technology, Bombay)
Email: [email protected]
9. MPISAI -G : A simple model for computational Grid
Karthik Prashanth J, Sanjeeth S, Vinod Varma,
Pandurangan .N and Baruah P.K.
(Sri Sathya Sai Institute of Higher Learning, Prashanthinilayam, India.)
Email: [email protected]
10. Supports for Processing Media Data in Embedded Processors
Geun-Chul Park, Sung-Soo Ahn, Hyun-Gyu Kim, and Hyeong-Cheol Oh
(Korea University, Korea)
Email: [email protected]
11. Reconfigurable Architecture of A High-Speed RSA Encryption Processor with Built-in
Table for Residue Calculation of Redundant Binary Numbers
Nobuhiro Tomabechi (Hachinohe Institute of Technology Japan)
Email: [email protected]
12. Power/Energy Perspective on Hyperblock Formation
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi and Davide Patti
(University of Catania, Italy)
Email: [email protected]
13. Basic Block Architecture for Power Saving
Dipak Krishnamani, Madhavi Krishnan, Sriram S., Ranjani Parthasarathi (Anna University)
Email: [email protected]
14. A Distributed Service Architecture for end-to-end Data Intensive Analysis
Jang-uk In, Laukik Chitnis, Richard Cavanaugh, Pradeep Padala,
Sanjay Ranka, Mandar Kulkarni, Paul Avery
(University of Florida)
Email: [email protected]
15. FAULT TOLERANT IRREGULAR AUGMENTED SHUFFLE NETWORK
Harsh Sadawarti and P.K. Bansal
(RIMT-Institute of Engineering & Technology, Mandi Gobindgarh, Punjab, India)
Email: [email protected]
16. SimMPI: An MPI-blockset for Simulink
Gaurav Sharma, A Krishnamurthy, B. L. Esken, T. Menke
(Ohio State University, SAIC, and SimAF), USA
Email: [email protected]
17. Bandwidth Optimization by Reliable-Path Determination in Mobile Ad-Hoc Networks
Sriram Raghavan, Srikanth Akkiraju, Santhosh Sridhar, Dr. V Vaidehi, Srikanth
(Anna University)
Email: [email protected]
18. An Efficient Technique For Dynamic Slicing of Concurrent C++ Programs
D. P Mohapatra, R. Mall, R. Kumar
(IIT Kharagpur)
Email: [email protected]
19. Intelligent Software Agent Technology-For a secure & Efficient Distributed Applications
Biswajeet Sahu
(U.P.Technical University)
Email: [email protected]
20. On the Optimality of Adaptive Excess Available Bandwith Allocation by a Guaranteed Rate Diff-Serve QoS Scheduler in a an Ad-Hoc Mobile Network
Avik Chakraborty
(IBM Global Services India Pvt. Ltd., Kolkata, India)
e-mail: [email protected]
21. Optimizing Binaries for Multiple Gain-factors Using State-based Model
Balpreet Singh Pankaj, Amit Gupta, Rajeev Kumar and P. P. Chakrabarti
(Indian Institute of Technology Kharagpur)
Email: [email protected]
22. An efficient Approach for Design Space Exploration using Static Constraints for
IP-based SOC Design
Abhishek Agarwal,Ananth.K.S, Nikitas A Alexandridis, Tarek EI-Ghazawi
and Sean X. Wang
(The George Washington University and George Mason University, Fairfax, USA)
Email: [email protected]
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Snapshots/Photos Taken during the Best Posters Award Session can be found at http://www.buyya.com/photos/hipc2004.
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