Preliminary Advance Program

Please note that the program below is subject to change and additions in the coming weeks.

8:00 - All Daytop^
Pre-conference event at the Hotel Cidade De Goa
Co-located all-day workshop on ARM SoC Lab-in-a-Box hosted by Xilinx University Program (XUP). See this page for details.

07:00top^
Registrations
07:30 - 08:30top^
Breakfast
08:30 - 10:30top^
Academic BOF (Future Network-on-Chips)
Student Research Symposium (click here for complete program.)
10:30 - 11:00top^
Break
11:00 - 13:00top^
Academic BOF (Challenges and Advances in Big Data)
Student Research Symposium
13:00 - 14:00top^
Lunch
14:00 - 16:00top^
Academic BOF (PhD & MS Student Research Forum)
SRS Poster Setup
16:00 - 16:30top^
break
16:30 - 18:30top^
Academic BOF (Simulation Technology – From Multicores to Data Centers)
Academic BOF (Women in Computing)
SRS Poster Setup
18:30 - 20:00top^
HiPC Reception and Mixer with Student Symposium Poster Exhibits

07:00 - 08:00top^
Breakfast and Registration
08:00 - 08:30top^
HiPC 2014: Inauguration and Opening Remarks
08:30 - 9:30top^
Keynote 1: Die Stacking is Happening
Bryan Black (Senior AMD Fellow, USA)
Session Chair:
09:30 - 10:00top^
Break
10:00 - 12:00top^
Technical Session 1: Network and Computer Architectures
Session Chair: Murali Annavaram
  • Optical Overlay NUCA: A High Speed Substrate for Shared L2 Caches
    Eldhose Peter (Indian Institute of Technology Delhi, India); Anuj Arora (Indian Institute of Technology, Delhi, India); Akriti Bagaria (IIT Delhi, India); Smruti Sarangi (IIT Delhi, India);

  • Trikon: A Hypervisor Aware Manycore Processor
    Rohan Bhalla (Indian Institute of Technology, Delhi, India); Prathmesh Kallurkar (Indian Institute of Technology, Delhi, India); Nitin Gupta (Amazon India pvt ltd, India); Smruti Sarangi (IIT Delhi, India);

  • Matrix-Matrix Multiplication on a Large Register File Architecture with Indirection
    Dheeraj Sreedhar (IBM India Research Labs, India); Jeff H. Derby (IBM, USA); Robert Montoye (IBM Research Division, USA); Charles Johnson (IBM Research Division, USA);

  • Scaling Graph Community Detection on the Tilera Many-core Architecture
    Daniel Gerardo Chavarria (Pacific Northwest National Laboratory, USA); Mahantesh Halappanavar (Pacific Northwest National Laboratory, USA); Ananth Kalyanaraman (Washington State University, USA);

  • Balancing Context Switch Penalty and Response Time with Elastic Time Slicing
    Nagakishore Jammula (Georgia Institute of Technology, USA); Moinuddin Qureshi (Georgia Institute of Technology, USA); Ada Gavrilovska (Georgia Institute of Technology, USA); Jongman Kim (Georgia Institute of Technology, USA);

  • Optimizing the performance of parallel applications on a 5D torus via task mapping
    Abhinav Bhatele (Lawrence Livermore National Laboratory, USA); Nikhil Jain (UIUC, USA); Katherine Isaacs (University of California, Davis, USA); Ronak Buch (University of Illinois at Urbana-Champaign, USA); Todd Gamblin (Lawrence Livermore National Laboratory, USA); Steven Langer (Lawrence Livermore National Laboratory, USA); Laxmikant V. Kale (University of Illinois at Urbana-Champaign, USA);

IRUS 1: Computational Atmospheric and Climate Science in HPC: Methods being developed to tackle the performance issues
Industry Demos & Exhibits
12:00 - 13:30top^
Lunch
13:30 - 15:30top^
Technical Session 2: MPI, I/O and Interconnects
Session Chair: Vipin Chaudhary
  • DRIVE: Using Implicit Caching Hints to achieve Disk I/O Reduction in Virtualized Environments
    Sujesha Sudevalayam (IIT Bombay, India); Purushottam Kulkarni (Indian Institute of Technology, Bombay, India); Rahul Balani (IBM Research India, India); Akshat Verma (IBM Research - India, India);

  • High Performance MPI Library over SR-IOV Enabled InfiniBand Clusters
    Jie Zhang (The Ohio State University, USA); Xiaoyi Lu (The Ohio State University, USA); Jithin Jose (The Ohio State University, USA); Mingzhe Li (The Ohio State University, USA); Rong Shi (The Ohio State University, USA); Dhabaleswar Panda (The Ohio State University, USA);

  • A High Performance Broadcast Design with Hardware Multicast and GPUDirect RDMA for Streaming Applications on Infiniband Clusters
    Akshay Venkatesh (Ohio State University, USA); Hari Subramoni (Senior Research Associate, USA); Khaled Hamidouche (The Ohio State University, USA); Dhabaleswar Panda (The Ohio State University, USA);

  • Combining HoL-blocking Avoidance and Differentiated Services in High-Speed Interconnects
    Pedro Yebenes (University of Castilla-La Mancha, Spain); Jesús Escudero-Sahuquillo (University of Castilla-La Mancha, Spain); Crispin Gomez (University of Castilla-La Mancha, Spain); Pedro Garcia (University of Castilla-La Mancha, Spain); Francisco Jose Alfaro (University of Castilla-La Mancha, Spain); Francisco J. Quiles (Universidad Castilla La Mancha, Spain); Jose Duato (Universidad Politecnica de Valencia, Spain);

  • Designing Efficient Small Message Transfer Mechanism for Inter-node MPI Communication on InfiniBand GPU Clusters
    Rong Shi (The Ohio State University, USA); Sreeram Potluri (The Ohio State University, USA); Khaled Hamidouche (The Ohio State University, USA); Mingzhe Li (The Ohio State University, USA); Davide Rossetti (NVIDIA Corporation, USA); Dhabaleswar Panda (The Ohio State University, USA);

  • On the Suitability of MPI as a PGAS Runtime
    Jeff Daily (Pacific Northwest National Laboratory, USA); Abhinav Vishnu (Pacific Northwest National Laboratory, USA); Bruce Palmer (Pacific Northwest National Laboratory, USA); Hubertus J. J. Van Dam (Pacific Northwest National Lab, USA); Darren J. Kerbyson (Pacific Northwest National Laboratory, USA);

Industry BOF 1-SHELL: Simulating and Visualizing Fluid Flow: HPC challenges
Industry Demos & Exhibits
15:30 - 16:00top^
Break
16:00 - 18:00top^
Technical Session 3: Graph Partitioning and Numerical Algorithms
Session Chair: Lionel Eyraud-Dubois
  • A Multilevel Compressed Sparse Row Format for Efficient Sparse Computations on Muticore Processors
    Humayun Kabir (The Pennsylvania State University, USA); Joshua Booth (The Pennsylvania State University, USA); Padma Raghavan (The Pennsylvania State University, USA);

  • Analysis and Tuning of Libtensor Framework on Multicore Architectures
    Khaled Z Ibrahim (Lawrence Berkeley National Labratory, USA); Samuel W. Williams (Lawrence Berkeley National Laboratory, USA); Evgeny Epifanovsky (UC Berkeley, USA); Anna Krylov (University of Southern California, USA);

  • Reducing elimination tree height for parallel LU factorization of sparse unsymmetric matrices
    Enver Kayaaslan (INRIA, France); Bora Uçar (CNRS, France);

  • Optimization of Scan Algorithms on Multi- and Many-core Processors
    Qiao Sun (Institute of Software, Chinese Academy of Sciences, P.R. China); Chao Yang (Institute of Software, Chinese Academy of Sciences, P.R. China);

  • Coupling-Aware Graph Partitioning Algorithms
    Aurélien Esnard (University of Bordeaux, LaBRI, INRIA Bordeaux Sud-Ouest, HiePACS, France); Maria Predari (University of Bordeaux, INRIA Bordeaux Sud-Ouest, HiePACS, France);

  • An improved recursive graph bipartitioning algorithm for well balanced domain decomposition
    Astrid Casadei (Bordeaux University, France); Pierre Ramet (University of Bordeaux, France); Jean Roman (INRIA, France);

Industry BOF 2-NVIDIA: CUDA 7 and Beyond & Machine Learning with GPUs
Industry Demos & Exhibits
18:00 - 19:00top^
Break
19:00 - 21:00top^
Industry BOF 3-MELLANOX: EDR - Step into the world of 100Gb/s

07:30 - 08:30top^
Breakfast and Registration
08:30 - 9:30top^
Keynote 2: Massive-scale Streaming Analytics
David A. Bader (Chair of the School of Computational Science and Engineering at Georgia Tech, USA)
Session Chair:
09:30 - 10:00top^
Break
10:00 - 12:00top^
Technical Session 4: Many Core and Storage
Session Chair: Manish Gupta
  • Queueing-based Storage Performance Modeling and Placement in OpenStack Environments
    Yang Song (IBM Research, USA); Rakesh Jain (IBM Research, USA); Ramani Routray (IBM Almaden Research Center, USA);

  • Premonition of Storage Response Class Using Skyline Ranked Ensemble Method
    Kumar Dheenadayalan (Qualcomm India Pvt Ltd, India); Muralidhara V n (IIIT Bangalore, India); Pushpa Datla (Qualcomm, India); G Srinivasaraghavan (IIITB, India); Maulik Shah (Qualcomm, India);

  • A Fast Implementation of MLR-MCL Algorithm on Multi-core Processors
    Qingpeng Niu (The Ohio State University, USA); Pai-Wei Lai (The Ohio State University, USA); SM Faisal (The Ohio State University, USA); Srinivasan Parthasarathy (The Ohio State University, USA); Ponnuswamy Sadayappan (Ohio State University, USA);

  • Interface for Heterogeneous Kernels: A Framework to Enable Hybrid OS Designs targeting High Performance Computing on Manycore Architectures
    Taku Shimosawa (Hitachi, Ltd., Japan); Balazs Gerofi (The University of Tokyo, Japan); Masamichi Takagi (RIKEN AICS, Japan); Gou Nakamura (Hitachi Solutions, Ltd., Japan); Tomoki Shirasawa (Hitachi Solutions East Japan, Ltd., Japan); Yuji Saeki (Hitachi, Ltd., Japan); Masaaki Shimizu (Central Research Laboratory, Hitachi, Ltd., Japan); Atsushi Hori (Riken, Japan); Yutaka Ishikawa (University of Tokyo, Japan);

  • Heterogeneous many cores for medical control: Performance, Scalability, and Accuracy
    Madhurima Pore (Arizona State University, USA); Ayan Banerjee (Arizona State University, USA); Sandeep Gupta (Arizona State University, USA);

  • Optimizing Shared Data Accesses in Distributed-Memory X10 Systems
    Jeeva Paudel (University of Alberta, Canada); Olivier Tardieu (IBM Research, USA); Jose Nelson Amaral (University of Alberta, Canada);

IRUS 2: Life Science & HPC: Issues in computer science, applied mathematics, scientific data management, visualization, and informatics
Industry Demos & Exhibits
12:00 - 13:30top^
Lunch
13:30 - 15:30top^
Technical Session 5: Scheduling and Cloud Computing
Session Chair: Yogesh Simmhan
  • Saving Energy by Exploiting Residual Imbalances on Iterative Applications
    Edson Luiz Padoin (Federal University of Rio Grande do Sul and Laboratoire d'Informatique de Grenoble, Brazil); Márcio Castro (Federal University of Rio Grande do Sul ; Laercio Pilla (UFRGS, Brazil); Philippe O. A. Navaux (Universidade Federal do Rio Grande do Sul, Brazil); Jean-François Méhaut (Grenoble University, France);

  • Efficient and Robust Allocation Algorithms in Clouds under Memory Constraints
    Olivier Beaumont (Inria, France); Lionel Eyraud-Dubois (INRIA Bordeaux Sud-Ouest, France); Juan-Angel Lorenzo (Inria, France); Paul Renaud-Goud (Chalmers University of Technology, Sweden);

  • Cache-Conscious Scheduling of Streaming Pipelines on Parallel Machines with Private Caches
    Kunal Agrawal (Washington University in St. Louis, USA); Jeremy Fineman (Georgetown University, USA); Jordyn Maglalang (Washington University in St. Louis, USA);

  • A Flexible Scheduling Framework for Heterogeneous CPU-GPU Clusters
    Kittisak Sajjapongse (University of Missouri, USA); Tejaswi Agarwal (University of Missouri, USA); Michela Becchi (University of Missouri - Columbia, USA);

  • Algorithms for Power-Aware Resource Activation
    Archita Agarwal (IBM Research - India, India); Sonika Arora (University of Delhi, India); Venkatesan T Chakaravarthy (IBM Research ; Yogish Sabharwal (IBM Research - India, India);

  • A Proactive Approach for Coping with Uncertain Resource Availabilities on Desktop Grids
    Louis-Claude Canon (Université de Franche-Comté, France); Adel Essafi (University of Grenoble, France); Denis R. Trystram (Grenoble Institute of Technology, France);

Industry BOF 4-AMD: OpenCL 2.0 and OpenMP 4.0
Industry Demos & Exhibits
15:30 - 16:00top^
Break
16:00 - 18:00top^
Technical Session 6: Applications: GPU Computing
Session Chair: Smruti Sarangi
  • Relax-Miracle: GPU Parallelization of Semi-Analytic Fourier-Domain solvers for Earthquake Modeling
    Nachiket Kapre (Nanyang Technological University, Singapore);

  • Particle Advection Performance Over Varied Architectures and Workloads
    Hank Childs (LBL, USA); Scott Biersdorff (University of Oregon, USA); David Poliakoff (University of Oregon, USA); David Camp (Lawrence Berkeley National Laboratory, USA); Allen D. Malony (University of Oregon, USA);

  • Parallel AMG Solver for Three Dimensional Unstructured Grids Using GPU
    RaviTej Kamakolanu (Indian Institute of Technology Hyderabad, India); Naveen Sivadasan (IITH, India); Vatsalya Sharma (Indian Institute of Technology, India); Raja Banerjee (Indian Institute of Technology Hyderabad, India);

  • Mixed-Precision Models for Calculation of High-Order Virial Coefficients on GPUs
    Chao Feng (University at Buffalo, SUNY, USA); Andrew Schultz (University at Buffalo, SUNY, USA); Vipin Chaudhary (University at Buffalo, SUNY, USA); David Kofke (University at Buffalo, SUNY, USA);

  • GpuTejas: A Parallel Simulator for GPU Architectures
    Geetika Malhotra (Indian Institute of Technology, Delhi, India); Seep Goel (Indian Institute of Technology, Delhi, India); Smruti Sarangi (IIT Delhi, India);

  • GPU Parallelization of the Stochastic On-time Arrival Problem
    Maleen Abeydeera (University of Moratuwa, Sri Lanka); Samitha Samaranayake (UC Berkeley, USA);

Industry BOF 5-INTEL: Convergence of Big Data and HPC infrastructure via Lustre
Industry Demos & Exhibits
Faculty Summit
18:00 - 19:00top^
Break
19:00 - 19:30top^
Award presentation + TopSCI
19:30 - 22:00top^
Banquet Dinner

07:30 - 08:30top^
Breakfast and Registration
08:30 - 9:30top^
Keynote 3: Fault Tolerant Techniques for Computing at Scale
Yves Robert (Professor, Computer Science Laboratory at LIP at ENS Lyon, France)
Session Chair:
09:30 - 10:00top^
Break
10:00 - 12:00top^
Technical Session 7: Software for HPC and Distributed Computing
Session Chair: Yutaka Ishikawa
  • Improving Multi-dimensional Query Processing with Data Migration in Distributed Cache Infrastructure
    Youngmoon Eom (Ulsan National Institute of Science and Technology, Korea); Jinwoong Kim (UNIST, Korea); Deukyeon Hwang (UNIST, Korea); Jaewon Kwak (UNIST, Korea); Minho Shin (Myongji University, Korea); Beomseok Nam (Ulsan National Institute of Science and Technology, Korea);

  • Towards Realizing the Potential of Malleable Jobs
    Abhishek Gupta (Intel Corp, USA); Bilge Acun (University of Illinois at Urbana Champaign, USA); Osman Sarood (University of Illinois Urbana Champaign, USA); Laxmikant V. Kale (University of Illinois at Urbana-Champaign, USA);

  • CQA: A Code Quality Analyzer tool at binary level
    Andres S. Charif-Rubial (University of Versailles Saint-Quentin en Yvelines, France); Emmanuel Oseret (University of Versailles Saint-Quentin en Yvelines, France); Ghislain Lartigue (University of Normandie, France); Jose Noudohouenou (University of Versailles Saint-Quentin en Yvelines, France); William Jalby (University of Versailles Saint-Quentin en Yvelines, France);

  • An Early Experience of Regional Ocean Modelling on Intel Many Integrated Core Architecture
    Srikanth Yalavarthi (Centre for Development of Advanced Computing, India); Akshara Kaginalkar (Centre for Development of Advanced Computing, India);

  • Online failure prediction for HPC resources using decentralized clustering
    Alejandro Pelaez (Rutgers University, USA); Manish Parashar (Rutgers, The State University of New Jersey, USA); Andres Quiroz (Xerox Research, USA); Jim Browne (UT Austin, USA); Edward Chuah (University of Texas at Austin, Singapore);

  • Xevolver: An XML-based Code Translation Framework for Supporting HPC Application Migration
    Hiroyuki Takizawa (Tohoku University, Japan); Shoichi Hirasawa (TOHOKU University, Japan); Yasuharu Hayashi (NEC Corporation, Japan); Ryusuke Egawa (Tohoku University Japan, Japan); Hiroaki Kobayashi (Tohoku University, Japan);

Indo-US Workshop (click here for complete program.)
12:00 - 13:30top^
Lunch
13:30 - 16:00top^
Technical Session 8: Algorithms and Computing on Accelerators
Session Chair: Srinivas Aluru
  • Distance Threshold Similarity Searches on Spatiotemporal Trajectories using GPGPU
    Michael Gowanlock (University of Hawaii at Manoa, USA); Henri Casanova (University of Hawaii at Manoa, USA);

  • Fine-grained GPU parallelization of Pairwise Local Sequence Alignment
    Chirag Jain (Indian Institute of Technology, Delhi, India); Subodh Kumar (IIT Delhi, India);

  • Software Based Ultrasound B-mode/Beamforming Optimization on GPU and its Performance Prediction
    Thi Yen Phuong (Hallym University, Korea); Jeong-Gun Lee (Hallym University, Korea);

  • Smart Multi-Task Scheduling for OpenCL Programs on CPU/GPU Heterogeneous Platforms
    Yuan Wen (University of Edinburgh, United Kingdom); Zheng Wang (Lancaster University, United Kingdom); Michael O'Boyle (Edinburgh, United Kingdom);

  • Design and Evaluation of Parallel Hashing over Large-scale Data
    Long Cheng (National University of Ireland Maynooth, Ireland); Spyros Kotoulas (IBM Research, Ireland); Tomas Ward (National University of Ireland Maynooth, Ireland); Georgios Theodoropoulos (Durham University, United Kingdom);

  • RADIR: Lock-free and Wait-free Bandwidth Allocation Models for Solid State Drives
    Pooja Aggarwal (Indian Institute of Technology, Delhi, India); Giridhar Yasa (NetApp, India); Smruti Sarangi (IIT Delhi, India);

  • Simple Parallel Biconnectivity Algorithms for Multicore Platforms
    George Slota (The Pennsylvania State University, USA); Kamesh Madduri (The Pennsylvania State University, USA);

Indo-US Workshop
16:00 - 16:30top^
Break
16:30 - 17:30top^
Indo-US Workshop