HiPC International Conference On High Performance Computing
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HiPC 2001 - Hyderabad, India - December 17-20
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Wednesday Dec. 19

8 :3 0 a m - 9 :3 0 a m
KEYNOTE ADDRESS
"High-Performance Scalable Java Virtual Machines"
Vivek Sarkar
IBM T. J. Watson Research Center

Vivek Sarkar is a Research Staff Member and Senior Manager of the Programming Technologies department at the IBM T. J. Watson Research Center. The projects in his department span the areas of dynamic compi-lation, adaptive optimization, high-performance Java virtual machines, component verification, debugging of multithreaded programs, soft-ware configuration management, and XML technologies for database applications.

Dr. Sarkar joined IBM in 1987, after obtaining a Ph. D. from Stanford University. During 1998 to 2000, he led the Jalapeno optimizing compiler group at the IBM T. J. Watson Research Center in building a new dynamic optimizing compiler for Java. He has been a member of the IBM Academy of Technology since 1995.
 

1 0 :0 0 a m - n o o n
S E S S I O N I I I
Architecture
Chair: Sriram Vajapeyam
Consultant

Shared Virtual Memory Clusters with Next-Generation Interconnection Networks and Wide Compute Nodes
Courtney R. Gibson and Angelos Bilas,
The University of Toronto

Stream-Packing: Resource Allocation in Web Server Farms with a QoS Guarantee
Johara Shahabuddin, IBM India Research
Lab., Abhay Chrungoo, Indian Institute of
Technology, Guwahati, Vishu Gupta,
Sandeep Juneja, and Sanjiv Kapoor,
Indian Institute of Technology, Delhi, and
Arun Kumar, IBM India Research Lab.

Weld: A Multithreading Technique towards Latency-tolerant VLIW Processors
Emre Ozer and Thomas M. Conte,
North Carolina State University

Putting Data Value Predictors to Work in Fine-Grain Parallel Processors
Aneesh Aggarwal and Manoj Franklin,
University of Maryland

Confidence Estimation for Branch Prediction Reversal
Juan L. Aragón, José González, and
José M. García, Universidad de Murcia, and
Antonio González, Universitat Politecnica de
Catalunya
Retargetable Program Profiling Using High Level
Processor Models
Rajiv Ravindran and Rajat Moona,
Indian Institute of Technology, Kanpur
 

1 :0 0 p m - 3 :0 0 p m
SESSION IV
Systems Software
Chair: Guang R. Gao
University of Delaware

Towards Automatic Synthesis of High-Performance Codes for Electronic Structure Calculations: Data Locality Optimization
Daniel Cociorva, John W. Wilkins, Gerald
Baumgartner, and P. Sadayappan, The Ohio
State University, J. Ramanujam, Louisiana
State University, Marcel Nooijen, Princeton
University, David E. Bernholdt, Oak Ridge
National Laboratory, and Robert Harrison,
Pacific Northwest National Laboratory

Block Asynchronous I/O - An Infrastructure for High-Performance User-Level Filesystems
Muthian Sivathanu, Venkateshwaran
Venkataramani, and Remzi H. Arpaci-Dusseau,
University of Wisconsin, Madison

TWLinuX: Operating System Support for Optimistic Parallel Discrete Event Simulation
Subramania Sharma T. and Matthew J.
Thazhuthaveetil, Indian Institute of Science

Low-Cost Garbage Collection for Causal Message Logging with Independent Checkpointing
Jinho Ahn and Chong Sun Hwang,
Korea University, Seoul

Improving the Precise Interrupt Mechanism of Software Managed TLB Miss Handlers
Aamer Jaleel and Bruce Jacob, University of
Maryland

Hidden Costs in Avoiding False Sharing in Software DSMs
K. V. Manjunath and R. Govindarajan,
Indian Institute of Science
 

3 :1 5 p m - 6 :3 0 p m
INDUSTRIAL TRACK SESSION
 
 

7 :0 0 p m - 1 0 :0 0 p m
BANQUET AND CULTURAL PROGRAM
"How to transform our departments with great established strength in education to become bubbling springs of high end world class research"
Speaker: Deepak Phatak
Indian Institute of Technology, Bombay