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Student Research Symposium Flyer � |
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HiPC 2009 will feature the second student research symposium on High Performance Computing (HPC) aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments. The symposium will also expose students to the best practices in HPC in academia and industry. The one-day symposium will feature brief presentations by student authors on their research, followed by a poster exhibit. Short invited talks by leading HPC researchers/practitioners will be included in the program. The symposium reception will provide an opportunity for students to interact with HPC researchers and practitioners (and recruiters) from academia and industry. To be considered, students should submit a 5 page extended abstract of their research. For additional details, please contact the Symposium Co-Chairs at student_symposium AT hipc.org. |
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Topics of interest |
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Topics of interest include, but are not limited to:
- High-Performance Computing
- Parallel and Distributed Algorithms
- Parallel Languages and Programming Environments
- Load Balancing, Scheduling and Resource Management
- Fault-Tolerant Algorithms and Systems
- Scientific/Engineering/Commercial Applications and Workloads
- Emerging Applications such as Biotechnology and Nanotechnology
- Cluster and Grid Computing
- Peer-to-peer Algorithms and Networks
- Heterogeneous Computing
- Wireless and Mobile Computing
- Communication/Sensor Networks and Embedded Applications
- Interconnection Networks and Architectures
- Scalable Servers and Systems
- High Performance/Scalable Storage Systems
- Power-Efficient and Reconfigurable Architectures
- Compiler Technologies for High-Performance Computing
- Software Support and Advanced Micro-architecture Techniques
- Operating Systems for Scalable High-Performance Computing
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Submissions Instructions |
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Please submit an extended abstract of your research results in PDF format electronically through EDAS. Authors can use last year's papers, available at http://hipc.org/hipc2008/studentsymposium.htm, as samples. Your document should be at most 5 letter or A4 size (8.5 x 11) pages in 11 pt or 12 pt font, single spaced, with at least one-inch margins on all sides. Please identify the names of student authors in a footnote. Poster selection will be competitive and all submissions will be reviewed. Manuscripts will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the conference attendees. If some part of your submission was published by you previously, then you should cite your prior work and indicate how the current submission differs from it.
Electronically submit your paper using through EDAS (http://edas.info/N8039).
The selected extended abstracts will be published online on the conference web site and on a CD to be distributed at the conference. They will not be part of the official conference technical paper proceedings.
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Eligibility |
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To be eligible to present at the symposium, the research work should primarily be the result of student research and should be presented by a student author. The student author should have been a full-time student at some point in 2009. Non-student co-authors are permitted. |
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Deadlines |
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Paper submission deadline (Extended): September 21, 2009. |
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Awards |
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The IEEE Technical Committee on Parallel Processing has agreed to sponsor best paper and best presentation awards for around Rs. 12000 each. |
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Scholarship opportunities for students from Indian institutions |
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Students from Indian academic institutions are encouraged to apply for the HiPC travel scholarship. As in the past, the conference will award travel scholarship to at least one student author of each accepted submission from Indian academic institutions. |
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Writing tips |
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Student authors may wish to read the following document, which provides tips on writing a research paper. |
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Technical Program Committee |
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1. David Bader, Georgia Tech
2. Ramamurthy Badrinath, HP
3. Pavan Balaji, Argonne National Lab
4. Purushotham Bangalore, University of Alabama
5. Surendra Byna, NEC Labs
6. Mainak Chaudhuri, IIT Kanpur
7. Arobinda Gupta, IIT Kharagpur
8. Ranjani Parthasarathy, Anna University
9. Rajeev Raje, IUPUI
10. Ashok Srinivasan, Florida State University
11. TSB Sudarshan, Amrita Vishwa Vidyapeetham University
12. Rajeev Thakur, Argonne National Lab
13. Gary Tyson Florida State University
14. Satish Vadhiyar, Indian Institute of Science
15. Abhinav Vishnu, Pacific Northwest National Lab
16. Joseph Zambreno, Iowa State University
17. Zhenghao Zhang, Florida State University |
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Symposium Co-Chairs |
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Ashok Srinivasan, Florida State University |
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Rajeev Thakur, Argonne National Laboratory,
USA |
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Co-ordinator |
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Smruti Sarangi, IBM India |
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TOP ^ |
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List of Accepted Papers |
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An Integrated Simulation and Visualization Framework for Tracking Cyclone Aila |
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Preeti Malakar (Indian Institute of Science, IN)
Vijay Natarajan (Indian Institute of Science Bangalore India, IN)
Sathish Santhanam Vadhiyar (Indian Institute of Science, IN)
Ravi S Nanjundiah (Indian Institute of Science, IN) |
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A Reconfigurable Hardware to Accelerate Directory Search |
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Venkatanathan Varadarajan (College of Engineering Guindy, Anna University, IN)
Sanath Kumar R (College of Engineering Guindy, Anna University, IN)
Arun Nedunchezhian (College of Engineering,Guindy, IN)
Ranjani Parthasarathi (CEG, Anna University, IN) |
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Probe Station Selection for Robust Network Monitoring |
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Maitreya Natu (Tata Research Development and Design Center, IN) |
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Fast GPGPU Data Rearrangement Kernels using CUDA |
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Dheevatsa Mudigere (Technischen Universit�t M�nchen (TUM), Munich, Germany, DE) |
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A communication model for determining optimal affinity on the Cell processor |
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C. D. Sudheer (Student, IN)
Sanaka Sriram (Student, IN)
Pallav Kumar Baruah (Sri Sathya Sai University, IN) |
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Parallelizing Two Dimensional Convex hull using CUDA and CellBE |
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Durga Prasad Reddy (International Institute of Information Technology, IN) |
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Core Specific Block Tagging (CSBT) based Thread Migration Model for Single ISA Heterogeneous Multi-core Processors |
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Venkatesh Karthik Srinivasan (College of Engineering, Anna University, IN)
Pragadeesh Raju (College of Engineering Guindy, Anna University, IN) |
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Evaluating Centrality Metrics in Real-World Networks on CUDA |
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Anuroop Sriram (IIIT, IN) |
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Middleware for Long-Running Applications on Batch Grids |
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Sivagama Sundari Murugavel (Indian Institute of Science, IN)
Sathish Santhanam Vadhiyar (Indian Institute of Science, IN)
Ravi S Nanjundiah (Indian Institute of Science, IN) |
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A New Parallel Algorithm for Minimum Spanning Tree Problem |
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Arun Nedunchezhian (College of Engineering,Guindy, IN)
Rohit Setia (IIT, Madras, IN)
Shankar Balachandran (IIT, Madras, IN) |
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Efficient Minimum Cost Reactive Monitoring of Gaussian Random Field in Wireless Sensor Networks |
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Amin Mohtasham (University of Tehran, IR)
Ahmad Khonsari (University of Tehran, IR)
Mohammad Sadegh Talebi (IPM, IR) |
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On the Comparative Performance of Parallel Algorithms on Small GPU/CUDA Clusters |
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Nishantha Karunadasa (University of Colombo School of Computing, LK)
Nalin Ranasinghe (University of Colombo School of Computing, LK) |
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Immediate Mode Scheduling Methods for Independent Jobs on Open Online Heterogeneous Systems |
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Abhishek Kumar (BITS Pilani - Goa Campus, IN)
Sireesha Yakkali (BITS Pilani - Goa Campus, IN)
Navneet Chaubey (BITS Pilani - Goa Campus, IN) |
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Poster-only Acceptance |
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Improving the software resilience to single event upsets and hard errors |
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Sharanyan Srikanthan (Motilal Nehru National Institute of Technology, IN) |
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Dominating Set based Selection of Time Synchronizing Nodes in Sensor Network |
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Vaishali P Sadaphal (Tata Research, IN) |
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Study and Implementation of Network Swap for Performance Improvement |
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Nirbhay Chandorkar (Homi Bhabha National Institute, Mumbai, India, IN) |
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Cloud Computing for Community Applications |
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Naveen Somasundaram (College of Engineering, Guindy, IN)
Ragavan Govindarajan
Santhosh Kumar J |
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FBGA-an FPGA Based Grid Architecture |
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Ashoke Sudakar (College of Engineering Guindy, Anna University, IN)
Avinash Kalyanaraman (College of Engineering,Guindy,Anna University, IN)
Pragadeesh Raju (College of Engineering Guindy, Anna University, IN)
Aiyampalayam Shanthi (Anna University, IN) |
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Universal Parallel Multiplier Architecture using Urdhva Tiryakbhyam Sutra |
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Ankit Mahanot (Birla Institute of Technology & Science, IN)
Atharva Chauthaiwale (Birla Institute of Technology & Science, IN)
Sudarshan Tsb (Amrita School of Engineering, IN) |
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Supporting Heterogeneity in Data Driven Sensor Network Macroprogramming |
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Mahanth Gowda (Institute of Technology, BHU, IN)
Animesh Pathak (INRIA Paris-Rocquencourt, FR) |
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Rethinking DRAM Design for Low-Power Datacenters |
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Aniruddha Udipi (University of Utah, US)
Niladrish Chatterjee (University of Utah, US)
Naveen Muralimanohar (HP Labs, US)
Rajeev Balasubramonian (University of Utah, US) |
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