Industry Birds of a Feather Sessions
Industry partners Birds of a Feather schedule and session details are provided below. All registered HiPC attendees are eligible to participate in these sessions.
* Industry BoF Speakers’ Bios (download pdf of bios with photos)
Fujitsu(7:00-9:00 PM - Thursday, December 17) |
| Fujitsu Forza, HPC Simplified |
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Speaker: Ashok Chaudhry |
| Details to be announced |
INTEL(10:00-12:00 PM - Friday, December 18) |
| Need to Modernize Legacy Code? |
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| This session is to help attendees learn how modernization of code can be made easier and will give participants an excellent opportunity to explore Intel’s High-End HPC hardware and software solutions and connect and interact with Intel leaders to learn how Intel can help to modernize code on the latest architecture. Many Enterprise Server apps are single-threaded or minimally-threaded. As CPU-per-processor continues to expand, the scaling problem only gets worse. Modern apps must be able to scale across CPUs and across nodes. Scalability requires developers re-architect algorithms, data models, and communication models. Modernizing your code on latest architecture can help you achieve breakthrough performance for highly parallel applications, and you won’t have to recode your entire problem or master new tools and programming models. The intended take-aways for attendees include: 1) Why parallel performance is important; 2) The need to modernize your code; 3) Which applications can benefit; and 4) How Intel can help. |
Shell(10:00 - 12:00 PM - Friday, December 18) | ||||||||||||||||||||
| From Data to Knowledge: Converting Data to Actionable Insights | ||||||||||||||||||||
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| The Shell BoF session at HiPC 2015 will have three talks presented, followed by a panel discussion on the topic: How much domain knowledge should be incorporated while doing data analysis? |
AMD(1:00-3:00 PM - Friday, December 18) |
| Opportunities for GPU computing in Integrated Computational Materials Engineering |
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Speaker: Gandham Phanikumar, Department of Metallurgical and Materials Engineering, Indian Institute of Technology Madras |
| This presentation will touch on various computer simulation techniques used during the development of new products or advanced materials, which are generally compute-intensive and vary across across multiple length scales and time scales. In particular, we will focus on Integrated Computational Materials Engineering (ICME), a paradigm which is fast-gaining adoption across the world due to its ability to reduce cycle time for the development of a new product or process. In addition, we will discuss the use of OpenCL as the platform of choice for coding, showcase benchmarks to highlight the speed advantages of using AMD FirePro GPUs, as well as the importance of Green-HPC(High Performance Computing). |
SanDisk(3:30-5:30 PM - Friday, December 18) |
| Contemplating a new memory hierarchy: a personal journey through persistent memory technologies |
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Speaker: Pankaj Mehra, VP and Senior Fellow at SanDisk |
| This talk takes a whole system view of programming and persistence in disaggregated systems, ideas I first espoused in a 2001 keynote. Since then, we have seen multiple solid state memory technologies transform the performance of database, filesystem, and virtualization workloads. As the next wave of technologies that have been in development for decades begin to roll out, many of the systems and software insights developed earlier still apply. The roles and motivations around existing technologies must now change. We survey traditional approaches to I/O optimization and much work that was done around the introduction of flash memory as fast disk. Focusing on some pioneering work done first in my persistent memory projects at HP then at Fusion-io, I will describe how this work which was the first to view solid state flash memory as memory rather than disk, now needs to evolve in order to address the rise of storage class memories. The talk will introduce new memory technologies from physics, through system attach points, to what threads, processes and CPU pipelines are likely to see. It will examine the state of the art up close, and end with a call to action for the HiPC community on accelerating progress toward compiler optimization of I/O. |