6^th Workshop on Education for High Performance Computing
(EduHiPC 2024)

Dec 18, 2024
Bengaluru, India

In conjunction with the 31st IEEE International Conference on High-Performance Computing, Data, & Analytics (HiPC 2024)

(New Track on “Research to Education” for HiPC researchers)

High Performance Computing (HPC) and, in general, Parallel and Distributed Computing (PDC) has become pervasive, from supercomputers and server farms containing multicore CPUs and GPUs, to individual PCs, laptops, and mobile devices. Therefore, it is important for every computing professional (and especially every programmer) to understand how parallelism and distributed computing affect problem solving. It is essential for educators to impart a range of PDC and HPC knowledge and skills at multiple levels within the educational fabric woven by Computer Science (CS), Computer Engineering (CE), and related computational curricula including data science. Companies and laboratories need people with these skills, and, as a result, they are finding that they must now engage in extensive on-the-job training. All the while, rapid changes in hardware platforms, languages, and programming environments increasingly challenge educators to decide what to teach and how to teach it in order to prepare students for careers that are increasingly involving PDC and HPC. EduHiPC aims to provide a forum that brings together academia, industry, government, and non-profit organizations – especially from India, its vicinity, and Asia – for exploring and exchanging experiences and ideas about the inclusion of high-performance, parallel, and distributed computing into undergraduate and graduate curriculum of Computer Science, Computer Engineering, Computational Science, Computational Engineering, and computational courses for STEM and business and other non-STEM disciplines.

The 6th EduHiPC workshop invited unpublished manuscripts from academia, industry, and research institutes on topics pertaining to the teaching of PDC/HPC topics. Methods, pedagogical approaches, tools, and techniques, employers’ experiences with and expectation of the level of PDC proficiency among new graduates, issues and experiences to address gender gap, teaching of HPC and Big Data analytics across STEM disciplines that have the potential for adoption across the broader community were of particular interest. The emphasis of the workshop was on undergraduate education. This year also included a new track on Research to Education, in addition to our regular track on educational research. For this new track, we welcomed researchers to submit 3-4-page manuscripts discussing their innovative experiences in integrating their research, as well as associated methods, tools, models, simulations, or datasets, into educational settings, with a focus on undergraduate/graduate or fostering broader community engagement. This year’s EduHiPC included keynotes by Prof. Dhabaleswar K. Panda on “Educating Students and Professionals in the AI Era”, by Prof. R. Govindarajan on “High Performance Computing: The Confluence of  Computer Architecture, Compiler Design, and Programming Languages” and by Dr. Chirnajib Sur on “Computing at scale – Role of Computational Engineering in the age of Artificial Intelligence.” We held a panel session on “Challenges in Modernizing Computing Education with HPC and AI,” moderated by Prof. Sushil K. Prasad, with panel members Prof. Viktor Prasanna, Ashish Kuvelkar,  P. Chitra,  and Bharatkumar Sharma.

We received 12 regular paper submissions of which four were accepted after careful review. Each submission reviewed received at least four reviews from the international program committee. The accepted papers covered topics ranging from programming frameworks and tools to PDC instruction techniques and experiences. These accepted papers are archived in the IEEE Xplore workshop proceedings. The EduHiPC-24 website at https://tcpp.cs.gsu.edu/curriculum/?q=eduHiPC24 hosts the complete online proceedings, including the presentation slides of the contributed papers and other relevant materials.

This year also saw an expansion of the EduHiPC instructor training program both in the number of trainees as well as the duration of training. Leveraging on Master Trainer Programs (MTP) conducted in  May 2024 jointly by Centre for Development of Advanced Computing (C-DAC) and All India Council for Technical Education (AICTE) under the aegis of India’s National Supercomputing Mission (NSM), the instructors who attended the MTP were invited to attend online  training program in topics related to PDC and HPC. Nine online sessions were conducted over a two-month period.  40 instructors – twice as many compared to previous editions – were selected from 60+ applications  based on the diversity of institutions with preference for lower tier institutions and demographics encouraging women and underrepresented groups, while prioritizing those instructors teaching introductory undergraduate computing courses. These instructors attended a final in-person day concluding right before EduHiPC workshop. These training programs, both online and in-person, were jointly conducted by faculty experts affiliated with CDER center, C-DAC scientists, and  IIT Goa faculty. The trainees were financially supported partly for their travel and lodging, in addition to their full HiPC conference registration, enabling them to also attend EduHiPC workshop and the entire conference.  

This EduHiPC effort is in coordination with the Center for Parallel and Distributed Computing Curriculum Development and Educational Resources (CDER). We thank the CDER center’s affiliates for their help with overall steering and reviews. The National Supercomputing Mission (NSM) HRD program and U.S. National Science Foundation (award # 2017590) are acknowledged for their support.

Advanced Program Schedule

Welcome and Introduction (8:30 AM)

Presenters: Sushil Prasad, Ashish Kuvelkar, Sharad Sinha, and Neelima Bayyapu

Keynote 1 (8:45 AM) : Educating Students and Professionals in the AI Era

Presenter: Dhabaleswar K. (DK) Panda, The Ohio State University, USA

Abstract: The fields of AI (including Machine Learning (ML), Deep Learning (DL), Big Data, and Data Science) are rapidly evolving. The effective development and usage of many AI models and the associated inference schemes depend on a good understanding of the underlying HPC hardware and software technologies. Thus, it is becoming a challenge for students and professionals to have a holistic understanding of this new field. In this context, I will share experiences from the following four initiatives in which I am engaged: 1) A semester-long course on `High-Performance Deep/Machine Learning’ for combined undergraduate and graduate students at the Ohio State University; 2) A two-series 14-week course (developed through an NSF funding) on ‘AI Bootcamp for Cyberinfrastructure Professionals’ working in many different HPC centers; 3) A Half-day/full-day conference tutorial on “Principles and Practice of High-Performance Deep/Machine Learning”, and 4) Nurturing Next-Gen students for democratizing AI through the NSF-funded ICICLE (icicle.ai) Institute. An overview of these initiatives and the associated approaches will be presented.

Bio: DK Panda is a Professor and University Distinguished Scholar of Computer Science and Engineering at the Ohio State University.  He is serving as the Director of the ICICLE NSF-AI Institute (https://icicle.ai). He has published over 500 papers. The MVAPICH MPI libraries, designed and developed by his research group (http://mvapich.cse.ohio-state.edu), are currently being used by more than 3,400 organizations worldwide (in 92 countries). More than 1.83 million downloads of this software have taken place from the project’s site. This software is empowering many clusters in the TOP500 list. High-performance and scalable solutions for Deep Learning frameworks and Machine Learning applications from his group are available from https://hidl.cse.ohio-state.edu. Similarly, scalable, and high-performance solutions for Big Data and Data science frameworks are available from https://hibd.cse.ohio-state.edu. Prof. Panda is an IEEE Fellow. He is a recipient of the 2022 IEEE Charles Babbage Award and the 2024 IEEE TCPP Outstanding Service and Contributions Award. More details about Prof. Panda are available at http://www.cse.ohio-state.edu/~panda.

TCPP Curriculum Initiative (10 AM – 10:30 AM)

Presenter: Sushil K. Prasad

Break (10:30 AM – 11 AM)

Session I – Pedagogy (11 AM – 12 PM)

Session Chair: Neelima Bayyapu

1. “Designing a Card Game for Computer Science Instructors to Evaluate Students’ Parallel and Distributed Computing Knowledge” by Srishti Srivastava and Mary Smith

2. “A Hands-On Approach To Teaching Parallel and Heterogeneous Computing” by Abubeker Abdurahman, Arihant Singh, Abrar Hossain and Kishwar Ahmed

Keynote 2 (12 PM – 1PM): High Performance Computing : The Confluence of  Computer Architecture, Compiler Design, and Programming Languages

Presenter: Prof. R. Govindarajan, Indian Institute of Science, India

Abstract: In this talk, I will present some of our research work on exploiting  parallelism, starting from instruction-level parallelism in  VLIW and superscalar processors to thread-level and task-level parallelisms in heterogeneous architectures involving CPU, GPUs and many-core architectures.

The talk will also touch upon programming models that are useful in addressing programmability and productivity challenges in domain specific languages. Finally, I will bring out the importance of  research in the interface of architecture and compiler design and programming models  for extracting performance, productivity, and portability.   I will also present how the research has led to the design of the curricula for an introductory course in High Performance Computing and Parallel Programming for Computational Scientists.  The research has also helped us identify and contribute to areas such as digital signal processing, graph analytics, and machine learning.

Bio: R. Govindarajan received his B.Sc. degree in Mathematics from Madras University in 1981 and B.E. (Electronics and Communication) and Ph.D. (Computer Science) degrees from the Indian Institute of  Science, Bangalore in 1984 and 1989 respectively. He has held postdoctoral research positions and visiting faculty positions at Universities in the USA and Canada.  Since 1995, he has been with the Supercomputer Education and Research Centre and the Department of Computer Science and Automation, Indian Institute of Science, Bangalore.  His research interests are in the areas of High Performance Computing, Compilation Techniques, and Computer Architecture. He has more than 140 research publications in international journals and refereed conferences.  He is a fellow of the Indian National Academy of Engineering, a Senior Member of  the IEEE and a Distinguished Member of the ACC.

Lunch Break (1 PM – 2 PM)

Keynote 3 (2 PM – 3 PM): Computing at scale – Role of Computational Engineering in the age of Artificial Intelligence

Presenter: Dr. Chiranjib Sur, Shell, India

Abstract: Computational science is about solving scientific problems numerically which is a very well-established field on its own. With the rapid growth in the field of computer science and related computing technology, there is a growing need to bring practices from engineering analysis and design into the field of scientific simulation.

The primary driver behind the need is to develop scalable scientific simulation software with which one can target for higher throughput, not just high performance. This is exactly why a field like computational engineering (CE) has emerged. CE is that area where computational mathematics, domain-specific science, core computer science, and software engineering converge.

In this presentation, we will be explaining different corners and the rationale behind developing expertise in such a field with some real-life examples covering all the areas that are the foundation of computational engineering, especially in the age where we are seeing massive growth in the area of artificial intelligence (AI).

Bio: Chiranjib, a senior member of IEEE and ACM, is the recipient of the 2003 Young Scientist Medal from the Indian Science Congress Association. Externally, he chaired the IEEE’s conference series on high-performance computing, data, and, analytics (www.hipc.org) from 2017-2023. He also serves on the advisory boards of several premier Indian academic institutions.

Session II – Tools and Experience (3 PM – 4 PM)

Session Chair: Sharad Sinha

1. “Leveraging Valgrind to Assess Concurrent, Testing-Unaware C Programs” by Prasun Dewan and Nalin Gaddis

2. “Experience and Learning from an NSM Nodal Center for Training in HPC and AI” by Rupesh Nasre

Tea break (4 PM – 4:30 PM)

Panel (4:30 PM – 6 PM): Challenges in Modernizing Computing Education with HPC and AI

Moderator: Prof. Sushil Prasad

Panel Members:

• Viktor Prasanna, USC, USA
• Ashish Kuvelkar – CDAC, India
• Chitra P. , Thiagarajar College of Engineering, India
• Bharat, Nvidia Pvt. Ltd., India
• Valerie Taylor, Argonne National Lab, USA

Closing Remarks (6 PM)

Presenters: Sushil Prasad, Ashish Kuvelkar, Sharad Sinha and Neelima Bayyapu

Call for Submissions

Topics of interest include, but are not limited to:

1. Pedagogical issues in incorporating PDC and HPC in undergraduate and graduate education, especially in core courses.
2. Novel ways of teaching PDC and HPC topics.
3. Issues and experiences addressing remote synchronous and asynchronous teaching of PDC/HPC during the gone by pandemic situation and its relevance in current context.
4. Data science and big data aspects of teaching HPC/PDC, including early experience with data science degree programs.
5. Evidence-based educational practices for teaching HPC/PDC topics that provide evidence about what works best under what circumstances.
6. Experience with incorporating PDC and HPC topics into core CS/CE courses and in domains.
7. Experience and challenges with HPC education in developing countries, especially in India and her neighboring Asian countries.
8. Computational Science and Engineering courses.
9. Pedagogical tools, programming environments, infrastructures, languages, and projects for PDC and HPC.
10. Employers’ experiences with new hires and expectation of the level of PDC and HPC proficiency among new graduates.
11. Education resources based on high-level programming languages and environments such as Python, CUDA, OpenCL, OpenACC, SYCL, oneAPI, Hadoop, and Spark.
12. Parallel and distributed models of programming and computation suitable for teaching, learning, and workforce development.
13. Issues and experiences addressing the gender gap in computing and broadening participation of underrepresented groups.
14. Challenges in remote teaching and evaluations, including those related to meaningful engagement of students and fair assessments.
15. Experience of teaching large scale online courses in HPC and PDC across multiple geographies and student background

Track 1 – Educational Research: For this track, we welcome researchers unpublished 6-8 page manuscripts from individuals or teams from academia, industry, and other educational and research institutes from all over the world on topics about the teaching of PDC topics in the Computer Science and Computer Engineering curriculum as well as in domain-specific computational and data science and engineering curricula. This track emphasizes conducting pedagogical research related to PDC education and evaluating it within classroom or other settings.

Track 2 – Research to Education (New):  For this particular track, we welcome researchers to submit 3-4-page manuscripts discussing their innovative experiences in integrating their research, as well as associated methods, tools, models, simulations, or datasets, into educational settings, with a focus on undergraduate/graduate or fostering broader community engagement. Submissions do not need to include an assessment of teaching techniques or in-class evaluations. 

SUBMISSION GUIDELINES

Authors should submit papers in PDF format through the submission site (https://easychair.org/conferences/?conf=eduhipc2024)

SUBMISSION GUIDELINES: We are accepting submissions for Track 1 Full Papers (6-8 pages), Track 2 Short Papers (3-4 pages), Posters (2-page abstracts), and Peachy Parallel Assignments (2-page abstracts).  Please see the details below for each category of submission. All entries must be submitted via the submission site (https://easychair.org/conferences/?conf=eduhipc2024). Ensure that submissions adhere to the IEEE format https://www.ieee.org/conferences/publishing/templates.html), featuring single-spaced, double-column pages with proper inclusion of figures, tables, and references.

Accepted regular and short papers will be published in the workshop proceedings and included in the IEEE Xplore digital library, and authors will present their work in a technical workshop session. Authors of accepted Posters and Peachy Assignments will present their work during the workshop poster sessions. Summary papers of all accepted posters and all accepted Peachy Assignments will also be published in the workshop proceedings.  Proceedings of the workshops are distributed at the conference and will be included in the IEEE Xplore Digital Library after the conference.  Summary papers will be written by the Poster and Peachy Assignment chairs and will include, as co-authors, all Poster and Peachy Assignment authors.  In addition, all individual abstracts, posters, and preprints of papers will be published on the CDER website. 

Papers: Authors are asked to submit 6-8 page papers in pdf format for Track 1 and 3-4 page papers in pdf format for Track 2. Submissions will be reviewed based on the novelty of contributions, impact on the broader undergraduate curriculum, particularly on the core curriculum, relevance to the workshop’s goals, and, for experience papers, the results of their evaluation and the evaluation methodology. 

Posters: High-quality poster presentations are an integral part of EduHiPC. We seek posters (2-page abstracts) describing recent or ongoing research in PDC Education.  

Peachy Parallel Assignments: Course assignments are integral to student learning and also play an important role in student perceptions of the field. EduHiPC will include a session showcasing “Peachy Parallel Assignments” – high-quality assignments, previously tested in class, that are readily adoptable by other educators teaching topics in parallel and distributed computing.  Assignments may be previously published, but the author must have the right to publish a description of it and share all supporting materials. We are seeking assignments that are:

1. Tested – All submitted assignments should have been used successfully in a class.
2. Adoptable – Preference will be given to widely applicable and easy-to-adopt assignments.  Traits of such assignments include coverage of widely taught concepts, using common parallel languages and widely available hardware, having few prerequisites, and (with variations) being appropriate for different levels of students.
3. Cool and inspirational – We want assignments that excite students and encourage them to spend time with the material.  Ideally, they would be things that students want to show off to their roommates.

Assignments can cover any topics in Parallel and Distributed Computing. Preference will be given to assignments aimed at students in the early courses. Submissions (2-page abstracts) should describe the assignment and its contextual usage and include a link to a web page containing the complete set of files given to students (assignment description, supporting code, etc.). The document should cover the following items: What is the main idea of the assignment? What concepts are covered?  Who are its targeted students?  In what context have you used it?  What prerequisite material does it assume they have seen?  What are its strengths and weaknesses?  Are there any variations that may be of interest?  Authors of papers accepted as poster papers will be invited to revise their papers in a 2-page format. Authors of all accepted full and short papers must be present at the workshop.

IMPORTANT DATES – EduHiPC Workshop

Submission site open: September 1, 2024

Paper, Posters, and Peachy Assignments submission deadline: September 23, 2024  Extended to October 10, 2024

Author notifications deadline: October 30, 2024

Camera-ready deadline: November 10, 2024

All deadlines are at 11:59 PM AoE (UTC-12).

ORGANIZATION COMMITTEE

Sushil Prasad, University of Texas, San Antonio, USA

Sheikh Ghafoor, Tennessee Tech University, USA

Alan Sussman, National Science Foundation & University of Maryland, USA

Ramachandran Vaidyanathan, Louisiana State University, USA

Charles Weems, University of Massachusetts, USA

Ashish Kuvelkar, C-DAC, India

Sharad Sinha, IIT Goa, India

Neelima Bayyapu, MIT, Manipal, India

Workshop Co-Chairs

Sushil K. Prasad, University of Texas San Antonio, USA, [email protected]

Ashish Kuvelkar, C-DAC, India, [email protected]

Program Co-Chairs

Sharad Sinha, IIT Goa, India, [email protected]

Neelima Bayyapu, MIT, Manipal, India, [email protected]

Peachy Assignment Chair

David P. Bunde, Knox College, USA

Web Master and Proceedings Chair

Buddhi Ashan Mallika Kankanamalage, University of Texas San Antonio, USA

Technical Program Committee

Sabbi Vamshi, Godavari Institute of Engineering and Technology, India

Srishti Srivastava, University of Southern Indiana, USA

Henry Gabb, Intel, USA

Satish Puri,  Marquette University, USA           

Shubbhi Taneja, Worcester Polytechnic Institute, USA  

Vivek Chaturvedi, Indian Institute of Technology, Palakkad, India              

Ramachandran Vaidyanathan, Louisiana State University, USA

Unnikrishnan Cheramangalath, Indian Institute of Technology Palakkad, India

Nasser Giacaman, The University of Auckland, New Zealand 

Kishore Kothapalli, International Institute of Information Technology, Hyderabad, India

Venkatesh Kamat, Indian Institute of Technology Goa, India

Alan Sussman, University of Maryland, USA             

Charles Weems , University of Massachusetts, USA

Jagpreet Singh, Indian Institute of Technology Ropar, India