Preliminary Advance Program

Please note that the program below is subject to change and additions in the coming weeks.

08:00 AM - All Daytop^
Pre-conference event at the Park Plaza Bengaluru

07:00 AMtop^
Registration
07:30 - 08:30 AMtop^
Breakfast
08:30 - 10:30 AMtop^
Student Research Symposium (Click here for complete program)
WORKSHOP 1: Computational Fluid Dynamics (CFD) (Click here for complete program)
WORKSHOP 3: InfoSymbiotics/Dynamic Data Driven Applications Systems (DDDAS) (Click here for complete program)
10:30 - 11:00 AMtop^
Break
11:00 - 1:00 PMtop^
Student Research Symposium
WORKSHOP 1: Computational Fluid Dynamics (CFD) (Click here for complete program)
WORKSHOP 3: InfoSymbiotics/Dynamic Data Driven Applications Systems (DDDAS) (Click here for complete program)
1:00 PM - 2:00 PMtop^
Lunch
2:00 PM - 4:00 PMtop^
Author Workshop
WORKSHOP 2: Foundations of Big Data Computing (Click here for complete program)
WORKSHOP 4: Architectural Support and Middleware for InfoSymbiotics/ Dynamic Data Driven Applications Systems (DDDAS) (Click here for complete program)
4:00 PM - 4:30 PMtop^
Break, Poster Setup
4:30 PM - 6:30 PMtop^
SRS Poster Session
WORKSHOP 2: Foundations of Big Data Computing (Click here for complete program)
WORKSHOP 4: Architectural Support and Middleware for InfoSymbiotics/ Dynamic Data Driven Applications Systems (DDDAS) (Click here for complete program)
6:30 PM - 8:00 PMtop^
HiPC Reception and Mixer with Student Symposium Poster Exhibits, Hi-Tea
Industry Gala

08:00 AM - 08:30 AMtop^
HiPC 2015: Inauguration and Opening Remarks
08:30 AM - 09:30 AMtop^
Keynote 1: Scale-out Beyond Map-reduce
Raghu Ramakrishnan (Microsoft)
Session Chair: Srinivas Aluru
9:30 AM - 10:00 AMtop^
Break
10:00 AM - 12:00 PMtop^
Technical Session 1: Resilience and Customization
Session Chair: Venkatram Vishwanath
  • Which Verification for Soft Error Detection?
    Leonardo Bautista-Gomez (Argonne National Laboratory, USA); Anne Benoit and Aurelien Cavelan (ENS Lyon, France); Saurabh Kumar Raina (Jaypee Institute of Information Technology, India); Yves Robert and Hongyang Sun (ENS Lyon, France)

  • Throughput Regulation in Shared Memory Multicore Processors
    Xinwei Chen, He Xiao, Yorai Wardi, and Sudhakar Yalamanchili (Georgia Institute of Technology, USA)

  • Application Taxonomy via Algorithmic Commonality for Domain-specific Architecture Design
    Yuanrong Wang and Qiangqiang Li (University of Chinese Academy of Sciences, P.R. China); Guangming Tan (Institute of Computing Technology, Chinese Academy of Sciences, P.R. China)

  • FlexCore: A Reconfigurable Processor Supporting Flexible, Dynamic Morphing
    Furat Afram and Kanad Ghose (State University of New York at Binghamton, USA)

  • High Efficiency Generalized Parallel Counters for Xilinx FPGAs
    Burhan Khurshid and Roohie Naaz (National Institute of Technology, Srinagar, India)

  • 2QW-Clock: An efficient SSD buffer management algorithm
    Dan He (Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology & Nanchang Hangkong University, P.R. China); Fang Wang, Dan Feng, Jing Ning Liu, and Yun Xiang Wu (Wuhan National Laboratory for Optoelectronics, Huazhong University of Science, P.R. China); Yang Hu (China Ship Development & Design Center, Wuhan, China); Ying He (Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology & Nanchang Hangkong University, P.R. China)

IRUS 1
Industry Demos and Exhibits (TBD)
12:00 PM - 1:30 PMtop^
Lunch
1:30 PM - 3:30 PMtop^
Technical Session 2: Numerical and Combinatorial Algorithms
Session Chair: Nodari Sitchinava
  • Task-based multifrontal QR solver for GPU-accelerated multicore architectures
    Emmanuel Agullo (INRIA / LaBRI, France); Alfredo Buttari (CNRS - IRIT Toulouse, France); Abdou Guermouche (Université de Bordeaux, France); Florent Lopez (Université Paul Sabatier, France)

  • Structural Agnostic SpMV: Adapting CSR-Adaptive for Irregular Matrices
    Mayank Daga and Joseph L. Greathouse (AMD Research, Advanced Micro Devices, Inc., USA)

  • On the resilience of parallel sparse hybrid solvers
    Emmanuel Agullo, Luc Giraud and Mawussi Zounon (Inria, France)

  • New Tridiagonal Systems Solvers on GPU architectures
    Adrián P. Diéguez, Margarita Amor and Ramón Doallo (University of A Coruña, Spain)

  • A Stable Parallel Algorithm for Diagonally Dominant Tridiagonal Linear Systems
    S. Chandra Sekhara Rao and Rabia Kamra (Indian Institute of Technology Delhi, India)

  • Optimizing Approximate Weighted Matching on Nvidia Kepler K40
    Md Naim and Fredrik Manne (University of Bergen, Norway); Mahantesh Halappanavar and Antonino Tumeo (Pacific Northwest National Laboratory, USA); Johannes Langguth (Simula Research Laboratory, Norway)

IRUS 2
Industry Demos and Exhibits (TBD)
3:30 PM - 4:00 PMtop^
Break
4:00 PM - 6:00 PMtop^
Technical Session 3: High-end Software
Session Chair: Adwait Jog
  • Improving Communication Throughput by Multipath Load Balancing on Blue Gene/Q
    Huy Bui (University of Illinois at Chicago, USA); Preeti Malakar, Venkatram Vishwanath, Todd Munson and Eun-Sung Jung (Argonne National Laboratory, USA); Andrew E Johnson (University of Illinois at Chicago, USA); Michael Papka (Argonne National Laboratory, USA); Jason Leigh (University of Hawaii at Manoa, USA)

  • Dynamic Adaptation for Elastic System Services using Virtual Servers
    Abhishek Kulkarni (Indiana University, USA); Hugh Greenberg and Michael Lang (Los Alamos National Laboratory, USA); Andrew Lumsdaine (Indiana University, USA)

  • Understanding the Benefits of Asynchronous Data Transfers in Media Processors
    Nagendra Gulur and Suriya Narayanan L (Texas Instruments, India)

  • Hardware-Transactional-Memory Based Speculative Parallel Discrete Event Simulation of Very Fine Grain Models
    Emanuele Santini, Mauro Ianni, Alessandro Pellegrini, and Francesco Quaglia (DIAG–Sapienza Università di Roma, Italy)

  • Towards Practical Page Placement for a Green Memory Manager
    Ashish Panwar and Kanchi Gopinath (Indian Institute of Science, India)

  • Efficient Barrier Implementation on the POWER8 Processor
    C. D. Sudheer (IBM IRL, India); Ashok Srinivasan (Florida State University, USA)

Compilation Research using LLVM - Academic BOF
Industry Demos and Exhibits (TBD)
6:00 PM - 6:30 PMtop^
Award Presentation
6:30 PM - 7:00 PMtop^
Break
7:00 PM - 10:00 PMtop^
Fujitsu Industry BOF

08:30 AM - 09:30 AMtop^
Keynote 2: Compilers and the Future of High Performance Computing
David Padua (University of Illinois at Urbana-Champaign)
Session Chair: Gagan Agrawal
9:30 AM - 10:00 AMtop^
Break
10:00 AM - 12:00 PMtop^
Technical Session 4: Applications 1
Session Chair: David Bader
  • On Accelerating Concurrent PCA Computations for Financial Risk Applications
    Anubhav Jain, Mayank Bakshi, Amit Kalele and Easwar Subramanian (TCS Innovation Labs, Tata Consultancy Services, India)

  • A Performance Model for GPU-Accelerated FDTD Applications
    Paul Baumeister and Thorsten Hater (Forschungszentrum Juelich, Germany); Jiri Kraus (NVIDIA, Germany); Dirk Pleiter (Forschungszentrum Jülich & Jülich Supercomputing Centre, Germany); Pierre Wahl (Vrije Universiteit Brussel and Luceda Photonics, Belgium)

  • Vectorized Big Integer Operations for Cryptosystems on Intel MIC Platform
    Cheng Chang and Shun Yao (Stony Brook University, USA); Dantong Yu (BNL, Upton, USA)

  • Characterizing Large Dataset GPU Compute Workloads Targeting Systems with Die-Stacked Memory
    Srividya Ramanathan, Gautam Hazari, Kanishka Lahiri, and Francesco Spadini (Advanced Micro Devices, Inc.), India)

  • A GPU-based MIS Aggregation Strategy
    T. Lewis, Shankar Sastry, Mike Kirby and Ross Whitaker (University of Utah, USA)

  • High Throughput Hierarchical Heavy Hitter Detection in Data Streams
    Da Tong and Viktor K. Prasanna (University of Southern California, USA)

Intel Industry BOF
Shell Industry BOF (Click here for complete program)
Industry Demos and Exhibits (TBD)
12:00 PM - 1:00 PMtop^
Lunch
1:00 PM - 3:00 PMtop^
Technical Session 5: High Performance Communication and Energy Efficient Computing
Session Chair: Sanjay Ranka
  • Offloaded GPU Collectives using CORE-Direct and CUDA Capabilities on IB Clusters
    Akshay Venkatesh, Khaled Hamidouche, Hari Subramoni and Dhabaleswar Panda (The Ohio State University, USA)

  • High Performance OpenSHMEM Strided Communication Support with InfiniBand UMR
    Mingzhe Li, Khaled Hamidouche, Xiaoyi Lu, Jie Zhang, Jian Lin and Dhabaleswar Panda (The Ohio State University, USA)

  • On the Use of Commodity Ethernet Technology in Exascale HPC Systems
    Mariano Benito, Enrique Vallejo and Ramon Beivide (University of Cantabria, Spain)

  • Trigeneous Platforms for Energy Efficient Computing of HPC Applications
    Santhosh Rethinagiri (BSC-Microsoft Research Centre & Barcelona Supercomputing Center, Spain); Oscar Palomar, Francisco Javier Arias Moreno, Adrian Cristal and Osman Unsal (Barcelona Supercomputing Center, Spain)

  • ColdBus: A Near-Optimal Power Efficient Optical Bus
    Eldhose Peter, Arun Thomas, Anuj Dhawan and Smruti Sarangi (IIT Delhi, India) (Indian Institute of Technology Delhi, India)

  • A Simple BSP-based Model to Predict Execution Time in GPU Applications
    Marcos Amarís, Alfredo Goldman and Daniel Cordeiro (University of São Paulo, Brazil); Raphael de Camargo (Universidade Federal do ABC, Brazil)

AMD Industry BOF
Industry Demos and Exhibits (TBD)
3:00 PM - 3:30 PMtop^
Break
3:30 PM - 5:30 PMtop^
Technical Session 6: Load Balancing and GPU Algorithms
Session Chair: Kishore Kothapalli
  • Partition with side effects
    Fanny Pascual (Universite Pierre et Marie Curie, Poland); Krzysztof Rzadca (University of Warsaw, Poland)

  • Geographically Distributed Load Balancing with (Almost) Arbitrary Load Functions
    Piotr Skowron and Krzysztof Rzadca (University of Warsaw, Poland)

  • Memory-Efficient Parallelization of 3D Lattice Boltzmann Flow Solver on a GPU
    Nhat-Phuong Tran and Myungho Lee (MyongJi University, Korea) ; Dong Hoon Choi (Korea Institute of Science and Technology Information, Korea)

  • Accelerating Complex Event Processing through GPUs
    Prabodha Srimal Rodrigo and Herath Mudiyanselage Nelanga Dilum Bandara (University of Moratuwa, Sri Lanka); Srinath Perera (WSO2 Inc. & University of Moratuwa, Sri Lanka)

  • Efficient Batched Predecessor Search in Shared Memory on GPUs
    Benjamin Karsin, Henri Casanova and Nodari Sitchinava (University of Hawai‘i at Mānoa, USA)

  • Strategies of SIMD computing for image coding in GPU
    Pablo Enfedaque, Francesc Auli-Llinas and Juan Carlos Moure (Universitat Autónoma de Barcelona, Spain)

Sandisk Industry BOF
Industry Demos and Exhibits (TBD)
5:30 PM - 7:00 PMtop^
Break
7:00 PM - 8:00 PMtop^
Banquet Cultural Program
8:00 PM - 10:00 PMtop^
Banquet Dinner

08:30 AM - 09:30 AMtop^
Keynote 3: The Architecture of Smart Phones
Trevor Mudge (University of Michigan)
Session Chair: Anne Benoit
9:30 AM - 10:00 AMtop^
Break
10:00 AM - 12:00 PMtop^
Technical Session 7: Cloud and Data-Intensive Computing
Session Chair: Ramamurthy Badrinath
  • IC-Data: Improving Compressed Data Processing in Hadoop
    Adnan Haider, Xi Yang and Ning Liu (Illinois Institute of Technology, USA); Shuibing He (Computer School of Wuhan University, P.R. China); Xian-He Sun (Illinois Institute of Technology, USA)

  • Dominoes: Speculative Repair in Erasure Coded Hadoop System
    Xi Yang (Illinois Institute of Technology, USA); Chen Feng (Institute of Computing Technology, P.R. China); Zhiwei Xu (Institute of Computing Technology, Chinese Academy of Sciences, P.R. China); Xian-He Sun (Illinois Institute of Technology, USA)

  • Collective Offload for Heterogeneous Clusters
    Vicenç Beltran, Jesús Labarta and Florentino Sainz (Barcelona Supercomputing Center, Spain)

  • Meta-scheduling of HPC Jobs in Day-Ahead Electricity Markets
    Prakash Murali and Sathish Vadhiyar (Indian Institute of Science, India)

  • Load Balancing and Accelerating Spatial Join Operations using Bitmap Indexing
    Sameh Abdulah (The Ohio State University, USA); Yu Su (Facebook, USA); Gagan Agrawal (The Ohio State University, USA)

  • Algorithm Level Fault Tolerance for Molecular Dynamic Applications
    Jiaqi Liu and Gagan Agrawal (The Ohio State University, USA)

Advanced Numerical Schemes for Massively Parallel Computing: Challenges and Opportunities - Academic BOF
12:00 PM - 1:30 PMtop^
Lunch
1:30 PM - 4:00 PMtop^
Technical Session 8: Applications 2
Session Chair: Alba Melo
  • V-PFORDelta: Data Compression for Energy Efficient Computation of Time Series
    Abdullah Al Hasib, Juan Cebrián and Lasse Natvig (Norwegian University of Science and Technology, Norway)

  • Holistic Management of Sustainable Geo-Distributed Data Centers
    Zahra Abbasi (Ericsson Research, USA); Sandeep Gupta (Arizona State University, USA)

  • Parallel Megabase DNA Sequence Comparison with OpenCL
    Marco Figueiredo, Jr., Edans Flavius de Oliveira Sandes, and Alba Cristina Magalhaes Alves de Melo (Universidade de Brasilia, Brazil);

  • Parallel Read Error Correction for Big Genomic Datasets
    Nagakishore Jammula (Georgia Institute of Technology, USA); Sriram Chockalingam (Indian Institute of Technology, Bombay, India); Srinivas Aluru (Georgia Institute of Technology & Indian Institute of Technology Bombay, USA)

  • High Performance Front Camera ADAS Applications on TI's TDA3X Platform
    Mihir N. Mody, Pramod Swami, Kedar Chitnis, Shyam Jagannathan, Kumar Desappan, Anshu Jain, and Deepak Poddar (Texas Instruments Pvt Ltd, India); Zoran Nikolic (Texas Instruments, USA); Prashanth Viswanath, Manu Mathew and Soyeb N Nagori (Texas Instruments Pvt Ltd, India); Hrushikesh Garud (Texas Instruments Pvt Ltd, Bangalore & School of Medical Science and Technology, IIT Kharagpur, India)

  • Information Theory Based Genome-scale Gene Networks Construction using MapReduce
    Sriram Chockalingam (Indian Institute of Technology, Bombay, India); Maneesha Aluru (Georgia Institute of Technology, USA); Srinivas Aluru (Georgia Institute of Technology & Indian Institute of Technology Bombay, USA)

Industry BOF 4