1st ROCS Workshop: RecOnfigurable Computing and Systems Workshop 2024
31st IEEE International Conference on High Performance Computing, Data, & Analytics
Dec 18, 2024
Bengaluru, India
In conjunction with the 31st IEEE International Conference on High-Performance Computing, Data, & Analytics (HiPC 2024)
Reconfigurable computing involves using hardware that can be dynamically reprogrammed to optimize performance for specific tasks. Heterogeneous computing combines different types of compute elements to handle diverse workloads efficiently. Field-Programmable Gate Arrays (FPGAs) are mainly used for reconfigurable computing, and are crucial for high-performance computing applications and accelerating machine learning (ML) applications. Unlike general-purpose CPUs and GPUs, FPGAs can be reconfigured to execute repetitive and computationally intense operations, offering better energy efficiency. The Reconfigurable Computing and Systems Workshop (ROCS) is the first edition running in conjunction with HIPC, aimed at attracting participants to discuss aspects of reconfigurable and heterogeneous computing systems. The broad topics of interest include architecture, programming methodologies, heterogeneous computing, applications such as ML acceleration, embedded systems, IoT devices, telecommunications, data center accelerators and related areas.
List of Accepted Papers:
1. Hybrid CPU-FPGA Accelerated Architecture for Hurst Surface Feature Extraction and SVM Classification of ECG Signals; Basab Bijoy Purkayastha – IIT Guwahati Shovan Barma- IIIT Guwahati
2. Efficient Feature Extraction For Vision Transformer Model Using a Custom CNN Accelerator; Harshavardhan Reddy Narra – JNTUH University College of Engineering, Science & Technology Hyderabad Hemanth Reddy Narra – Silabs India Private Limited
Call for Papers:
Topics of interest include but are not limited to the following areas:
Reconfigurable System Architecture
- FPGA-based Accelerators for ML
- ML for FPGA design
- Reconfigurable Computing Systems
- FPGA architecture exploration
- Memory architectures for FPGAs
Heterogeneous computing systems
- Graphics Processing Units, heterogeneous systems-on-chip
- Network-on-chip (NoC) architectures and protocols for heterogeneous systems
- Parallel algorithms, scheduling on heterogeneous systems
- Design, benchmarking and analysis of accelerators for ML applications
Software Programmability and Tool Support
- High-Level Synthesis
- Debugging and Verification Tools
- Emerging OpenSource FPGA EDA/tool flows
- Partial Reconfiguration Methods
- Prototyping, and Profiling Tools
Important Dates
Submission Deadline: Sep 30, 2024 Extended to Oct 10, 2024, AOE
Accept/Reject Decision Notification: Oct 30, 2024, AOE
Camera-ready Deadline for the Accepted Papers: Nov 10, 2024, AOE
Symposium: Dec 18 2024
General guidelines: Manuscripts submitted to ROCS 2024 should not have been previously published or be under review for a different workshop, conference or journal. Abstracts should contain no more than 300 words and must be submitted along with the paper by the paper submission deadline. The title and abstract submitted by this deadline should have sufficient detail and not just be a placeholder. The submission website should have the final list of authors, as changes may not be feasible later. However, the submitted papers should not list the authors as we follow a double-blind policy. Papers not following these guidelines will be rejected without review. The accepted papers will be part of the HiPCW (HiPC Workshop) proceedings
Length of submission: Submitted manuscripts can be full papers or short papers.
- Full papers may not exceed six (6) single-spaced double-column pages using 10-point size font on 8.5×11 inch pages (IEEE conference style) plus one extra page for references.
- Short papers may not exceed four (4) plus one extra page for references in the same format.
- The IEEE paper template is available at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html
Double blind policy: All submitted manuscripts will be reviewed by the Program Committee under a double-blind review process. So the submitted paper should NOT list any authors or their affiliations or references to any of their previous work.
Workshop website: https://www.hipc.org/rocs-workshop/
Submission link: Submit your paper at: https://easychair.org/my/conference?conf=rocs2024
Organization committee:
- Workshop chairs:
Nanditha Rao, International Institute of Information Technology Bangalore ([email protected])
Jason Lin, University of Southern California ([email protected]) - Publicity:
Nanditha Rao, International Institute of Information Technology Bangalore ([email protected])
- Technical Program Committee:
- Aman Arora – Arizona State University
- Binod Kumar – IIT Jodhpur
- Hemangee Kapoor – IIT Guwahati
- Madhura Purnaprajna – AMD
- Masahiro Fujita- University of Tokyo
- Nitya Hariharan- Intel
- Sachin Patkar, IIT Bombay
- Sharad Sinha- IIT Goa
- Vipin K- BITS Pilani Goa campus
- Vivek Chaturvedi- IIT Palakkad
Contact: Questions may be sent to [email protected]
HiPC 2024 is the 31st edition of the IEEE International Conference on High Performance Computing, Data, and Analytics. It will be an in-person event in Bengaluru, India, from December 18 to December 21, 2024.
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