4th Workshop on Education for High Performance Computing (EduHiPC 2022)

18 December, 2022, Bangalore, India

EduHiPC Faculty Training Workshop on 17 December

EduHiPC 2022 Technical Program

8:45 AM Welcome and Introduction

Sushil Prasad, Sheikh Ghafoor, Ashish Kuvelkar and Preeti Malakar


9:00 AM Keynote 1: Prof. P. J. Narayanan, IIIT Hyderabad


Profile of PJ Narayan


Talk title: Computing & Computer Vision: The Synergy


Abstract: Computer Vision and other fields of AI both depend heavily on and push the frontiers of high-performance computing. Early supercomputers were built for applications like image processing or had them as a major focus area. Applications in computer vision and similar areas have helped push computing to get more powerful and accessible. In this talk, we would look at the synergy between high-end computing and the leading-edge of computer vision.


Speaker bio: P. J. Narayanan is a professor at the International Institute of Information Technology, Hyderabad, and the institute’s current director since April 2013. Narayanan obtained his B. Tech degree in computer science and engineering from Indian Institute of Technology, Kharagpur in 1984. Narayanan graduated with a master’s degree from University of Maryland, College Park, US in 1989 and obtained his Ph.D in computer science from University of Maryland, College Park, US in 1991 where he worked with Prof. Larry Davis. He is known for his work in computer vision (3D reconstruction, structure-from-motion, computational displays), computer graphics (ray-tracing of implicit surfaces, dynamic scenes), and parallel computing on the GPU (graph algorithms, string sorting, ML techniques like graph cuts, ANN and clustering, as well as several computer vision tasks).


10:00 – 10:30 AM Break and Poster viewing


10:30 AM – 12:00 PM Paper Session 1 (Session Chair TBD)


Paper 1:  Designing an Independent Study to Create HPC Learning Experiences for Undergraduates (ID: 7913)
Sandino Vargas-Perez 


Paper 2: PDC Course Development and Assessment Process for the betterment of Teaching-Learning Process (ID: 493)
Neelima Bayyapu

Paper 3: A Visual Guide to MPI All-to-all (ID: 1786)
Nick Netterville, Ke Fan, Sidharth Kumar , Thomas Gilray


12:00 – 1:00 PM Lunch Break


1:00 – 2:00 PM Keynote 2: Dr. Karthikeyan Vaidyanathan, Intel Bangalore


Profile of Karthikeyan


Talk Title: Into the world of Exascale Computing & Beyond – India’s opportunity


Abstract: Exascale HPC systems are paving the way to AI-driven HPC research, enabling a new class of data-driven models for solving scientific problems. In this talk, I will highlight a few examples of such AI-driven HPC applications, describe the recent trends in exascale systems and explain the challenges involved in delivering best performance for these applications on such computing platforms. Next, I will describe how one can systematically optimize HPC applications like GNN, Scanpy and QCD on single-core, multi-core, multi-numa and multi-node systems.   Finally, I will share my thoughts on how India can become a global leader in this field by creating interdisciplinary moonshots, bringing academic institutes and industry together for research and building exascale infrastructure, curriculum and skillset.


Speaker bio: Karthikeyan Vaidyanathan is a HPC and Deep Learning Scale-out Architect at Intel. His responsibilities include delivering best application performance in large-scale datacenters, defining and optimizing collective communication algorithms, coming up with novel framework-level optimizations, co-designing hardware/software for future scale-up and scale-out systems and estimating the application performance for such systems via simulations. Karthik has made significant contributions to the Machine Learning Scalability Library (MLSL), MLPERF submissions, large-scale (up to ~10000 nodes) Top500 and Green500 runs enabling Intel to achieve #1 ranking. Karthik, in collaboration with several national labs in the US, was instrumental in delivering record-breaking performance of several HPC applications including QCD and FFT. Karthik is an Intel Achievement Awardee, recipient of Intel Labs Gordy Award, and author of several top-tier conference papers and patents. Karthik received his Ph.D. from The Ohio State University, USA. Karthik is also an adjunct faculty at IIITB teaching advanced courses like network based computing for HPC and router/switch engineering design.


2:00 – 3:00 PM Paper Session 2 (Session Chair TBD)


Paper 4: Hands-On, Instructor-Light, Checked and Tracked Training of Trainers in Java Fork-Join Abstractions (ID: 9661)
Prasun Dewan, Andrew Worley, Samuel George, Felipe Yanaga, Andrew Wortas, James Juschuk, Mike Rogers, Sheikh Ghafoor

Paper 5: A Hands-on Approach for Scalable Parallel Applications Development: From Testbed to Petascale (ID: 3556)
Deepak Aggarwal, Arkaprava Bokshi, Deep Lad


3:00 – 3:30 PM Break and Poster viewing


3:30 – 3:45 PM Poster viewing


3:45 – 4:45 PM Panel Discussion


Panel on Challenges of Early Adoption of PDC/HPC Education in Computing and Engineering curriculum in India and Developing Countries


Moderator: Sushil Prasad

Prof. Madhura Purnaprajna, PES Bangalore, India (currently at AMD)
Prof. Sashikumaar Ganesan, IISc Bangalore, India
Prof. Sidharth Kumar, University of Alabama, USA
Dr. Nitya Hariharan, Intel Bangalore



Call for Submission (Closed)

High Performance Computing (HPC) and, in general, Parallel and Distributed Computing (PDC) is ubiquitous. Every computing device, from a smartphone to a supercomputer, relies on parallel processing.  Compute clusters of multicore and manycore processors (CPUs and GPUs) are routinely used in many subdomains of computer science (CS) such as computer vision, data science, parallel machine learning and high performance computing. Therefore, it is important for every programmer, software professional and CS researchers to understand how parallelism and distributed computing affect problem solving. It is essential for educators to impart a range of PDC and HPC skills and knowledge at multiple levels within the curriculum of Computer Science (CS), Computer Engineering (CE), and related disciplines such as computational data science. Software industry and research laboratories require people with these skills, more so now. Thus, they now engage in extensive on-the-job training. Additionally, rapid changes in hardware platforms, languages, and programming environments increasingly challenge educators to decide what to teach and how to teach, in order to prepare students for careers that involve PDC and HPC. EduHiPC aims to provide a forum that brings together academia, industry, government, and non-profit organizations – especially from India, its vicinity, and Asia – for exploring and exchanging experiences and ideas about the inclusion of high-performance, parallel, and distributed computing into undergraduate and graduate curriculum of Computer Science, Computer Engineering, Computational Science, Computational Engineering, and computational courses for STEM and business and other non-STEM disciplines.


The 4th EduHiPC (EduHiPC 2022) workshop invites unpublished manuscripts from academia, industry, and government laboratories on topics pertaining to needs and approaches for augmenting undergraduate and graduate education in Computer Science and Engineering, Computational Science, and computational courses for both STEM and business disciplines with PDC and HPC concepts. Additionally, we encourage manuscripts that validate their innovative approaches through the systematic collection and analysis of information to evaluate their performance and impact. The workshop is particularly dedicated to bringing together stakeholders from industry (hardware vendors and research and development organizations), government labs, and academia in the context of HiPC 2022. The goal of the workshop is to hear the challenges faced by educators and professionals, to learn about various approaches to addressing these challenges, and to have opportunities to exchange ideas and solutions. We also encourage submissions related to the challenges in imparting education during this difficult pandemic situation and online evaluation mechanisms for PDC/HPC. This effort is in coordination with the Center for Parallel and Distributed Computing Curriculum Development and Educational Resources (CDER).


Topics of interest include, but are not limited to:


  1. Pedagogical issues in incorporating PDC and HPC in undergraduate and graduate education, especially in core courses.
  2. Novel ways of teaching PDC and HPC topics.
  3. Issues and experiences addressing remote synchronous and asynchronous teaching of PDC/HPC during the current pandemic situation.
  4. Data science and big data aspects of teaching HPC/PDC, including early experience with data science degree programs.
  5. Evidence-based educational practices for teaching HPC/PDC topics that provide evidence about what works best under what circumstances.
  6. Experience with incorporating PDC and HPC topics into core CS/CE courses and in domains.
  7. Experience and challenges with HPC education in developing countries, especially in India and her neighboring Asian countries.
  8. Computational Science and Engineering courses.
  9. Pedagogical tools, programming environments, infrastructures, languages, and projects for PDC and HPC.
  10. Employers’ experiences with new hires and expectation of the level of PDC and HPC proficiency among new graduates.
  11. Education resources based on high-level programming languages and environments such as Python, CUDA, OpenCL, OpenACC, SYCL, oneAPI, Hadoop, and Spark.
  12. Parallel and distributed models of programming and computation suitable for teaching, learning, and workforce development.
  13. Issues and experiences addressing the gender gap in computing and broadening participation of underrepresented groups.
  14. Challenges in remote teaching and evaluations, including those related to meaningful engagement of students and fair assessments.



Authors should submit papers in PDF format through the submission site (https://easychair.org/my/conference?conf=eduhipc22)


We are accepting submissions for full papers (up to 8 pages including figures, tables, and references). Submissions should be formatted as single-spaced, double-column pages (IEEE format). Authors must try to revise their papers to incorporate feedback from the reviewers. All accepted papers will be published in the HiPC Workshop Proceedings and will be included in the IEEE Xplore digital library — every accepted paper will have at least one author who will register at the notified registration fee and also present the paper at the conference. For extraneous circumstances authors may be allowed to present virtually.  Accepted papers will be available from the CDER website approximately 2 weeks before the workshop so that attendees can read papers before attending the talks. Papers that are not accepted as full papers may be optionally accepted as short poster papers (2 pages). Authors of papers accepted as poster papers will be invited to revise their papers in a 2-page format. Authors of all accepted full and short papers must be present at the workshop. Authors will be further invited to publish their work in a Journal of Parallel and Distributed Computing (JPDC) special issue, as in the past workshops. 


EduHiPC Faculty Training Workshop: There will be a full day hands on training workshop on how to integrate parallel and distributed computing (PDC) in undergraduate CS and CE curriculum on December 17 (a day prior to EduHiPC workshop). The training is targeted for faculty who teach undergraduate CS/CE classes and do not have expertise in PDC. The training will be jointly conducted by Scientist from CDAC and Faculty experts affiliated with CDER center. CDAC India will sponsor registration fee for HiPC conference for 20 participants attending the training workshop. Travel stipend to attend the training workshop and EduHiPC workshop is also available for participants from outside of greater Bengaluru area. Interested faculty are encouraged to apply to participate in the workshop by completing the following application form.

https://tntech.co1.qualtrics.com/jfe/form/SV_0UjzcUH7fzGjtLn. Further details can be found in https://tcpp.cs.gsu.edu/curriculum/?q=system/files/TrainingWorkshopFlyer2022.pdf



We are accepting submissions for posters (1-page abstract). Please see above the topics of interest. Authors should submit papers in PDF format through the submission site (https://easychair.org/my/conference?conf=eduhipc22)





Abstract Submission Deadline: September 22, 2022 (encouraged)

Paper Submission Deadline: September 30, 2022, October 15, 2022

Paper Notification: November 5, 2022

Camera-ready Deadline: November 15, 2022

Poster abstract submission due date: November 30
Poster notification: December 2

All deadlines are at 11:59 PM AoE (UTC-12).




Organizing Committee

Sushil Prasad, University of Texas, San Antonio, USA

Sheikh Ghafoor, Tennessee Tech University, USA

Alan Sussman, National Science Foundation & University of Maryland, USA

Ramachandran Vaidyanathan, Louisiana State University, USA

Anshul Gupta, IBM, USA

Charles Weems, University of Massachusetts, USA

Ashish Kuvelkar, C-DAC, India

Preeti Malakar, IIT Kanpur, India


Workshop Co-Chairs

Sushil K. Prasad, University of Texas San Antonio, USA, [email protected]

Sheikh Ghafoor, Tennessee Tech University, USA, [email protected]


Program Co-Chairs

Ashish Kuvelkar, C-DAC, India, [email protected]

Preeti Malakar, IIT Kanpur, India, [email protected]


Proceedings Chair

Satish Puri, Marquette University, USA


Web Master

Michael McDermott, Georgia State University, USA


Tentative Program Committee

Ramachandran Vaidyanathan, Louisiana State University, USA

Martina Barnas, Indiana University Bloomington, USA

Nasser Giacaman, The University of Auckland, NZ

Henry Gabb, Intel, USA

Mike Rogers, Tennessee Tech University, USA

Anshul Gupta, IBM Research, USA

Ritu Arora, University of Texas, USA

David Brown, Elmhurst University, USA

Joel Adams, Calvin College, USA

Charles Weems, University of Massachusetts, USA

Alan Sussman, University of Maryland, USA

David Bunde, Knox College, USA

Chitra P., Thiagarajar College of Engineering, India

Devangi Parikh, University of Texas, USA

Somnath Roy, IIT Kharagpur

Unnikrishnan C, IIT Palakkad

Swarnendu Biswas, IIT Kanpur

Jagpreet Singh, IIIT Allahabad

Ramakrishna, IIT Tirupati

Sandeep Chandran, IIT Palakkad, India

Bharat Kumar, Nvidia, India

Subodh Sharma, IIT Delhi, India

Shiva Gopalakrishnan, IIT Bombay, India

Konduri Aditya, IISc Bangalore

Suresh Purini, IIIT Hyderabad

Dhiraj Patil, IIT Dharwad

Rupesh Nasre, IIT Madras
Shubbhi Taneja, Worcester Polytechnic Institute, USA