Advance Program

HiPC 2019

HiPC 2019 Advance Program

2019 Program Schedule

25 November 2019 Edition


Tuesday, Dec 17, 2019 – Day 1

HiPC Workshops, Tutorials


Wednesday, Dec 18, 2019 – Day 2

HiPC 2019 SRS, Industry Exhibits, IRUS, Women in Computing, Industry-Academia BOF Session


HiPC 2019 Inauguration and Opening Remarks (8:00-8:30)


Keynote Address: (8:30-9:30)

Vivek Sarkar, Georgia Institute of Technology

Title: Data Flow Execution Models – a Third Opinion

(Session chair: Rama Govindaraju)


Technical Session 1: Algorithms for Graphs and Emerging Platforms (10:00-12:00)

(Session chair: Kishore Kothapalli)


HyDetect: A Hybrid CPU-GPU Algorithm for Community Detection ​

Anwesha Bhowmik and Sathish Vadhiyar (Indian Institute of Science, Bangalore, India)


Distributed Relational Algebra at Scale (Best Paper)

Sidharth Kumar and Thomas Gilray (University of Alabama, Birmingham, USA)


Optimizing Breadth-First Search at Scale Using Hardware Accelerated Collectives

Khaled Ibrahim (Lawrence Berkeley National Laboratory, Berkeley, CA, USA)


Shared-Memory Parallel Maximal Biclique Enumeration

Apurba Das (National University of Singapore, Singapore) and Srikanta Tirthapura (Iowa State University, USA)


A Deterministic Multi-Layered Partitioning Tool for Wire-length Reduction of Monolithic 3D-IC

Soumendu Ghorui, Sabyasachee Banerjee and Subhashis Majumder (Heritage Institute of Technology, Kolkata, India)


Mapping Arbitrarily Sparse Two-body Interactions on One-dimensional Quantum Circuits

Arif Khan, Mahantesh Halappanavar, Tobias Hagge, and Karol Kowalski (Pacific Northwest National Laboratory, USA), Alex Pothen (Purdue University, USA) and Sriram Krishnamoorthy (Pacific Northwest National Laboratory, USA)


Technical Session 2: Data Management and Visualization (1:00-3:00)

(Session chair: Sriram Krishnamoorthy)


Replaceability based Web Service Selection Approach

Lalit Purohit and Sandeep Kumar (Indian Institute of Technology Roorkee, India)



Analysis in the Data Path of an Object-centric Data Management System

Richard Warren, Jerome Soumagne, and Jingqing Mu (The HDF Group, USA), Houjun Tang, Suren Byna, Bin Dong and Quincey Koziol (Lawrence Berkeley National Laboratory, USA)


Exploring Metadata Search Essentials for Scientific Data Management

Wei Zhang (Texas Tech University, USA), Suren Byna (Lawrence Berkeley National Laboratory, USA), Chenxu Niu and Yong Chen (Texas Tech University, USA)


Designing a Profiling and Visualization Tool for Scalable and In-Depth Analysis of High-Performance GPU Clusters

Pouya Kousha, Bharath Ramesh, Kaushik Kandadi Suresh, Ching-Hsiang Chu, Arpan Jain, Nick Sarkauskas, Hari Subramoni and Dhabaleswar Panda (The Ohio State University, USA)


Tuning Object-centric Data Management Systems for Large Scale Scientific Applications

Houjun Tang, Suren Byna, Stephen Bailey, Zarija Lukic, Jialin Liu, Quincey Koziol and Bin Dong (Lawrence Berkeley National Laboratory, USA)


k-NN Sampling for Visualization of Dynamic data using LION-tSNE

Dharamsotu Bheekya, K Swarupa Rani, Salman Abdul Moiz and C. Raghavendra Rao (University of Hyderabad, India) 




Technical Session 3: Applications and Learning (3:15-5:15)

(Session chair: Dhabaleswar K. Panda)


Efficient Parallel Multi-bunch Beam-Beam Simulation in Particle Colliders

Ioannis Sakiotis (Old Dominion University, USA), Kamesh Arumugam (NVIDIA, USA), Desh Ranjan, Balsa Terzic and Mohammad Zubair (Old Dominion University, USA)


Bit-wise and Multi-GPU Implementations of the DNA Recombination Algorithm

Elnaz Tavakoli Yazdi, Ankur Limaye, Ali Akoglu, Tosiron Adegbija and Adam Buntzma (University of Arizona, Tucson, USA)


Hierarchical Filter and Refinement System over Large Polygonal Datasets on CPU-GPU

Yiming Liu, Jie Yang and Satish Puri (Marquette University, USA)


Geostatistical Modeling and Prediction using Mixed Precision Tile Cholesky Factorization

Sameh Abdulah, Hatem Ltaief, Ying Sun, Marc Genton and David Keyes (King Abdullah University of Science Technology, Saudi Arabia)


Acceleration of Sparse Vector Autoregressive Modeling using GPUs

Shreenivas Bharadwaj Venkataramanan, (University of California San Diego, USA), Yogish Sabharwal (IBM Research, India), and Rahul Garg (Indian Institute of Technology, Delhi, India)

Fast and Accurate Learning of Knowledge Graph Embeddings at Scale

Udit Gupta and Sathish Vadhiyar (Indian Institute of Science, Bangalore, India)


Thursday, December 19, 2019 – Day 3

HiPC 2019 SRS, Industry Exhibits, IRUS


Keynote Address: (8:30-9:30)

Ramesh Hariharan, Strand Life Sciences

Title: Genome Sequencing For Disease Diagnosis: The Confluence of Biology and Computing

(Session chair: Ananth Kalyanaraman)


Technical Session 4: Accelerated Learning (10:00-12:00)

(Session chair: Aravind Sukumaran-Rajam)


On Linear Learning with Manycore Processors (Best Paper Finalist)

Eliza Wszola (ETH Zurich, Switzerland), Celestine Mendler-Dünner (UC Berkeley, USA), Martin Jaggi (EPFL Lausanne, Switzerland), and Markus Püschel (ETH Zurich, Switzerland)


SPEC2: SPECtral SParsE CNN Accelerator on FPGAs

Yue Niu, Hanqing Zeng, Ajitesh Srivastava, Kartik Lakhotia (University of Southern California, USA), Rajgopal Kannan (US Army Research Lab-West, USA), Yanzhi Wang (Northeastern University, USA), and Viktor Prasanna (University of Southern California, USA)


Architecture-Centric Bottleneck Analysis for Deep Neural Network Applications

Jihyun Ryoo, Mengran Fan, Xulong Tang, and Huaipan Jiang (Pennsylvania State University, USA), Meena Arunachalam and Sharada Naveen (Intel, USA) and Mahmut Kandemir (Pennsylvania State University, USA)


Efficient Sparse Neural Networks using Regularized Multi Block Sparsity Pattern on a GPU

Dharma Teja Vooturi and Kishore Kothapalli (International Institute of Information Technology, Hyderabad, India)


Memory and Interconnect Optimizations for Peta-Scale Deep Learning Systems (Best Paper Finalist)

Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Philip Heidelberger, Leland Chang and Kailash Gopalakrishnan (IBM T. J. Watson Research Center, USA)


Accelerating Data Loading in Deep Neural Network Training

Chih-Chieh Yang and Guojing Cong (IBM T. J. Watson Research Center, USA)


Keynote Address: (1:00-2:00)

Mark Papermaster, AMD

Title: Delivering the Future of High-Performance Computing

(Session chair: Chiranjib Sur)


Special Technical Session: India Research (2:00-3:30)

(Session chair: Yogesh Simmhan)


Technical Session 5: Storage and Communication (3:45-5:30)

(Session chair: Suren Byna)


IsoKV: An Isolation Scheme for Key-value Stores by Exploiting Internal Parallelism in SSD

Heerak Lim, Hwajung Kim, Kihyeon Myung, Heon and Young Yeom (Seoul National University, Republic of Korea) and Yongseok Son (Chung-Ang University, Seoul, Republic of Korea)


SCOR-KV: SIMD-Aware Client-Centric and Optimistic RDMA-based Key-Value Store for Emerging CPU Architectures

Dipti Shankar, Xiaoyi Lu and Dhabaleswar K. Panda (The Ohio State University, USA)


High-Performance Adaptive MPI Derived Datatype Communication for Modern Multi-GPU Systems Ching-Hsiang Chu, Jahanzeb Maqbool Hashmi, Kawthar Shafie Khorassani, Hari Subramoni and Dhabaleswar Panda (The Ohio State University, USA)


Online Management of Hybrid DRAM-NVMM Memory for HPC

Reza Salkhordeh and André Brinkmann (Johannes Gutenberg University, Germany)


User-Level Scheduled Communications for MPI

Derek Schafer and K. Sheikh Ghafoor (Tennessee Technological University, USA), Daniel J. Holmes (University of Edinburgh, Scotland, UK), Martin Ruefenacht and Anthony Skjellum (SimCenter and University of Tennessee at Chattanooga, USA)




Conference Banquet (starting at 6:30)


Friday, December 20, 2019 – Day 4


Keynote Address: (8:30-9:30)

José Roberto Alvarez, Intel

Title: The New World of Heterogeneous AI/ML High Performance Computing with Intel FPGAs

(Session chair: Viktor Prasanna)


Technical Session 6: Storage, Fault tolerance, and Resilience (10:00-12:00)

(Session chair: Purushotham Bangalore)


MLBS: Transparent Data Caching in Hierarchical Storage for Out-of-Core HPC Applications

Tariq Alturkestani, Thierry Tonellot, Hatem Ltaief, Rached Abdelkhalak, Vincent Etienne and David Keyes


Reducing False Node Failure Predictions in HPC

Alvaro Frank, Dai Yang, Andre Brinkmann, Martin Schulz and Tim Süss


Ground-Truth Prediction to Accelerate Soft-ErrorImpact Analysis for Iterative Methods

Burcu O. Mutlu, Gokcen Kestor, Adrian Cristal, Osman Unsal and Sriram Krishnamoorthy


Efficient Memory Pool Allocation Algorithm for CNN Inference

Arun Abraham, Manas Sahni and Akshay Parashar


A Linux Kernel Scheduler Extension for Multi-Core Systems

Aleix Roca, Samuel Rodriguez, Albert Segura, Vicenç Beltran and Kevin Marquet


uMMAP-IO: User-level Memory-mapped I/O for HPC (Best Paper)

Sergio Rivas-Gomez, Alessandro Fanfarillo, Sebastien Valat, Christophe Laferriere, Philippe Couvee, Sai Narasimhamurthy and Stefano Markidis


Technical Session 7: Parallel and Data Frameworks (1:00-3:00)

(Session chair: Sameh Abdulah)


DeepSparse: A Task-parallel Framework for Sparse Solvers on Deep Memory Architectures

Md Afibuzzaman and Fazlay Rabbi (Michigan State University, USA), M. Yusuf Özkaya (Georgia Institute of Technology, USA), Hasan Metin Aktulga (Michigan State University, USA) and Ümit V. Çatalyürek (Georgia Institute of Technology, USA)


Worksharing Tasks: an Efficient Way to Explot Irregular and Fine-Grained Loop Parallelism

Marcos Maroñas, Kevin Sala, and Sergi Mateo (Barcelona Supercomputing Center, Spain), Eduard Ayguadé (Barcelona Supercomputing Center & Universitat Politècnica de Catalunya, Spain), and Vicenç Beltran (Barcelona Supercomputing Center, Spain)


Empirical analysis of hardware-assisted GPU virtualization

Anshuj Garg and Purushottam Kulkarni (ndian Institute of Technology Bombay, India), Uday Kurkure, Hari Sivaraman and Lan Vu (VMware, Inc., USA)


Evaluating the Impact of Energy Efficient Networks on HPC Workloads

Giorgis Georgakoudis (Lawrence Livermore National Laboratory, USA), Nikhil Jain (NVIDIA, Inc., USA), Takatsugu Ono and Koji Inoue (Kyushu University, Japan), Shinobu Miwa (The University of Electro-Communications, Japan) and Abhinav Bhatele (Lawrence Livermore National Laboratory and University of Maryland, College Park, USA)