Co-sponsored by:
IEEE Computer Society Technical Committee on
Parallel Processing
ACM SIGARCH
and
Indian Institute of Technology, Chennai
Advance Program
ACKNOWLEDGMENTS
THE ORGANIZING COMMITTEE OF HiPC '98
GRATEFULLY ACKNOWLEDGES THE SUPPORT AND PARTICIPATION
OF THE FOLLOWING ORGANIZATIONS:
Centre
for Development of Advanced Computing, India
Centre for AI Research, India
Compaq Asia Pvt. Limited
CSIR Centre for Mathematical Modelling and
Computer Simulation, India
Digital Equipment (India) Limited
Future Software Pvt. Limited
Hewlett Packard India Software Operations,
Pvt. Limited
IBM Global Services (India) Limited
IBM Solutions Research Centre, India
Indian Institute of Science, Bangalore
Indian Institutes of Technology
Infosys Technologies Limited, India
Intel Corporation
Microland Limited
Novell Software Development (India) Pvt.
Limited
PlanetAsia Limited
Satyam Computer Services Limited
Silicon Graphics Systems (India) Pvt. Limited
Software Technology Parks of India
Sun Microsystems Intercontinental Operations
Supercomputer Education and Research Centre,
India
Tata IBM Limited, India
Tata Institute of Fundamental Research
(TIFR), India
WIPRO Limited
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
GENERAL CO-CHAIRS
Viktor K. Prasanna
University of Southern California
S.V. Raghavan
Indian Institute of Technology, Chennai
VICE GENERAL CHAIR
D.N. Jayasimha
Intel Corporation
PROGRAM CHAIR
Oscar H. Ibarra
University of California, Santa Barbara
PROGRAM VICE CHAIRS
Mikhail Atallah
Purdue University
José Duato
Universidad Politecnica de Valencia, Spain
Michel Dubois
University of Southern California
Chris Jesshope
Massey University, New Zealand
Vipin Kumar
University of Minnesota
C.P. Ravikumar
Indian Institute of Technology, New Delhi
INVITED SPEAKER/PANEL COORDINATOR
Arvind
MIT
POSTER/PRESENTATION CHAIR
Prith Banerjee
Northwestern University
EXHIBITS CHAIR
S.K. Nandy
Indian Institute of Science
STUDENT AWARDS CHAIR
C.P. Ravikumar
Indian Institute of Technology, New Delhi
TUTORIALS CHAIR
Sharad Gavali
NASA
PUBLICITY CO-CHAIRS
Sandeep Gupta
Colorado State University
R. Govindarajan
Indian Institute of Science
FINANCE CO-CHAIRS
A.K.P. Nambiar
Software Technology Park, Bangalore
Ajay Gupta
Western Michigan University
STEERING COMMITTEE
Arvind, MIT
Vijay Bhatkar, C-DAC
Wen-Tsuen Chen, National Tsing Hua
University, Taiwan
Yoo Kun Cho, Seoul National University, Korea
Michel Cosnard, Ecole Normale Superieure de
Lyon, France
José Duato, Universidad Politecnica de
Valencia, Spain
Ian Foster, Argonne National Labs.
Anoop Gupta, Stanford University and
Microsoft Research
Louis Hertzberger, University of Amsterdam,
The Netherlands
Chris Jesshope, Massey University, New
Zealand
David Kahaner, Asian Technology Information
Program, Japan
Guojie Li, National Research Centre for
Intelligent Computing Systems, China
Miroslaw Malek, Humboldt University, Germany
Lionel Ni, Michigan State University
Lalit M. Patnaik, Indian Institute of Science
Viktor K. Prasanna, USC, Chair
N. Radhakrishnan, US Army
José Rolim, University of Geneva,
Switzerland
Sartaj Sahni, University of Florida
Assaf Schuster, Technion, Israel Institute of
Technology, Israel
Vaidy Sunderam, Emory University
Satish Tripathi, University of California,
Riverside
David Walker, Oak Ridge National Labs.
K.S. Yajnik, Yajnik and Associates
Albert Y. Zomaya, University of Western
Australia
NATIONAL ADVISORY COMMITTEE
Alok Aggarwal, IBM
Solutions Research Centre, India
R.K. Bagga, DRDL, Hyderabad
N. Balakrishnan, Supercomputer Education and
Research Centre, Indian Institute of Science
Ashok Desai, Silicon Graphics Systems (India)
Private Ltd.
H.K. Kaura, Bhabha Atomic Research Centre
Hans H. Krafka, Siemens Communication
Software Ltd.
Ashish Mahadwar, PlanetAsia Ltd.
Pradeep Marwaha, Cray Research International
Inc.
Susanta Misra, Motorola India Electronics
Ltd.
Som Mittal, Digital Equipment (India) Ltd.
B.V. Naidu, Software Technology Park,
Bangalore
N.R. Narayana Murthy, Infosys Technologies
Ltd.
S.V. Raghavan, Indian Institute of
Technology, Chennai
V. Rajaraman, Jawaharlal Nehru Centre for
Advanced Scientific Research
S. Ramadorai, Tata Consultancy Services,
Mumbai
K. Ramani, Future Software Pvt. Ltd.
S. Ramani, National Centre for Software
Technology
Uday Shukla, Tata IBM Ltd.
U.N. Sinha, National Aerospace Laboratories
PROGRAM COMMITTEE
Gul
Agha, University of Illinois
Ishfaq Ahmad, Hong Kong University of Science
and Technology
Eliezer Albacea, University of the
Philippines
P.C.P. Bhatt, Kochi University of Technology,
Japan
Bhargab Bhattacharya, Indian Statistical
Institute, Calcutta
Laxmi Bhuyan, Texas A&M University
John Bruno, University of California, Santa
Barbara
Walter Burkhard, University of California,
San Diego
Alok Choudhary, Northwestern University
Michel Cosnard, LORIA - INRIA, France
Jack Dongarra, University of Tennessee/Oak
Ridge National Laboratory
Hossam ElGindy, University of Newcastle,
Australia
Sharad Gavali, NASA
Ananth Grama, Purdue University
Tsan-sheng Hsu, Academia Sinica, Taiwan
Joseph Jaja, University of Maryland
Zvi Kedem, New York University
Ashfaq Khokhar, University of Delaware
Myung Kim, Ewha Woman's University, Korea
Zhiyuan Li, Purdue University
Burkhard Monien, University of Paderborn,
Germany
C. Siva Ram Murthy, Indian Institute of
Technology, Chennai
Michael Palis, Rutgers University
Dhabaleswar Panda, The Ohio State University
Behrooz Parhami, University of California,
Santa Barbara
Murray Pearson, University of Waikato, New
Zealand
Keshav Pingali, Cornell University
Constantine Polychronopoulos, University of
Illinois
C.S. Raghavendra, The Aerospace Corporation
Sanjay Ranka, University of Florida
Catherine Roucairol, University of
Versailles-Saint- Quentin, France
Sartaj Sahni, University of Florida
Joel Saltz, University of Maryland
Sanjeev Saxena, Indian Institute of
Technology, Kanpur
Assaf Schuster, Technion, Israel
Ambuj Singh, University of California, Santa
Barbara
Y.N. Srikant, Indian Institute of Science
Per Stenstrom, Chalmers University of
Technology, Sweden
Pavel Tvrdik, Czech Technical University
Mateo Valero, Universidad Politecnica de
Catalunya, Spain
Biing-Feng Wang, National Tsing Hua
University, Taiwan
Tao Yang, University of California, Santa
Barbara
Pen Yew, University of Minnesota
Chung-Kwong Yuen, National University of
Singapore
Hans Zima, University of Vienna
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
KEYNOTE SPEAKERS
Andrew A. Chien
University of California, San Diego and
National Center for Supercomputing
Applications
University of Illinois at Urbana-Champaign
Technologies for Building a Teraflop
Windows NT Cluster
José Duato
Universidad Politecnica de Valencia
Critical Issues in Design and
Implementation of Interconnects for Workstation Clusters
Joseph A. Fisher
Hewlett-Packard Laboratories
Custom-Fit Processors
Raj Jain
The Ohio State University
Recent Trends in Networking Including
ATM and Its Traffic Management
Charles E. Leiserson
MIT Laboratory for Computer Science
Teaching Parallel Algorithms Using the
Cilk Multithreaded Programming Language
Keshav Pingali
Cornell University
Data-centric Program Restructuring
PANEL
Killer Applications Driving Future Architectures
Moderator:
Anant Agarwal, MIT
Panelists:
Arvind, MIT
Andrew A. Chien, University of California,
San Diego
Joseph A. Fisher, Hewlett-Packard
Charles Leiserson, MIT
Keshav Pingali, Cornell University
N. Radhakrishnan, US Army
Guri Sohi, University of Wisconsin
CONTRIBUTED PAPERS
There will be 62 contributed papers from 15 countries. These will be presented in 10 sessions.
TUTORIALS
High
Performance Data Mining
Vipin Kumar, University of Minnesota
Mahesh Joshi, University of Minnesota
Mobile
Wireless Communication and Computing
Sajal K. Das, University of North Texas,
Denton
Java
Programming and Compilation
Milind Girkar, Microcomputer Research Labs,
Intel Corporation
High-Performance
I/O Systems: From Architectures to Applications
Alok Choudhary, Northwestern University
Architectural
and Design Implications of Mediaprocessing
Pradeep K. Dubey, IBM Solutions Research
Centre, New Delhi, India
POSTER/PRESENTATION SESSION
In addition to parallel sessions of contributed papers, a plenary poster/presentation session emphasizing novel applications of high performance computing will be held on Friday. It will offer a brief presentation time for each poster and will be followed by a walk-up and talk setting. For details, contact the
Poster/Presentation
Chair:
Prith Banerjee
Northwestern University
(banerjee@eecs.nwu.edu)
EXHIBITS/VENDOR PRESENTATIONS
Companies and R & D laboratories are encouraged to display their exhibits at the meeting as well as present their products in the Industrial Track sessions. For details, contact the
Exhibit Chair:
S.K. Nandy
Supercomputer Education and Research Centre
Indian Institute of Science
Bangalore 560012, India
Fax: +91 (80) 334 6648
Vox: +91 (80) 334 1811
Email: nandy@serc.iisc.ernet.in
Updated
meeting information will be available on the Web at www.hipc.org/hipc98/
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
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8:25 AM - 8:30 AM
OPENING REMARKS
Viktor K. Prasanna
S.V. Raghavan
Oscar H. Ibarra
8:30 AM - 9:30 AM
KEYNOTE ADDRESS
Teaching Parallel Algorithms Using the Cilk Multithreaded Programming Language
Infosys
Distinguished Speaker:
Charles E. Leiserson
MIT Laboratory for Computer Science
10:00 AM - 11:30
AM
SESSION I-A
Architecture
Chair: Franco Zambonelli, Universita di
Modena, Italy
New Number Representation and Conversion
Techniques on Reconfigurable Mesh
Alan A. Bertossi and Alessandro Mei,
University of Trento
Precise Control of Instruction Caches
Maria Smirli, University of Patras, Dimitris
Lioupis, Computer Technology Institute, Patras, and
Kevin Kissell, Silicon Graphics
More on Arbitrary Boundary Packed Arithmetic
P.S. Karthikeyan, Indian Institute of
Technology, Chennai and P.S. Ranganathan, Sri Venkateswara College of Engineering,
Pennalur
Data Prefetching with Co-operative Caching
Chi-Hung Chi, National University of
Singapore
PERL - A Registerless Processor
P. Suresh and Rajat Moona, Indian Institute
of Technology, Kanpur
Design
Alternatives for Shared Memory Multiprocessors
John Carter, Chen-Chi Kuo, Ravindra
Kuramkote, and Mark Swanson, University of Utah
10:00 AM - 11:30
AM
SESSION I-B
Algorithms
Chair: Sanjay Ranka, University of
Florida, USA
Implementing a Parallel List on the SB-PRAM
Andreas Paul and Jochen Rohrig, Universitat
des Saarlandes
A Simple Optimal List Ranking Algorithm
Abhiram Ranade, Indian Institute of
Technology, Mumbai
A Parallel Skeletonization Algorithm and its
VLSI Architecture
N. Sudha and S. Nandi, Indian Institute of
Technology, Guwahati
Improving Error Bounds for Multipole-Based
Treecodes
Ananth Grama, Vivek Sarin, and Ahmed Sameh,
Purdue University
Computation of Penetration Measures for Convex
Polygons and Polyhedra for Graphics Applications
K. Sridharan, Indian Institute of Technology,
Guwahati
Extrapolation in Distributed Adaptive
Integration
Elise de Doncker, Ajay Gupta, Rodger Zanny,
and John Maile, Western Michigan University
NOON - 1:30 PM
SESSION II-A
Compilers and Run-Time Systems
Chair: Keshav Pingali, Cornell University,
USA
Data Structure Distribution &
Multi-threading of Linux File System for Multiprocessors
Anish Sheth and K. Gopinath, Indian Institute
of Science
Mapping Instruction Sequences onto
EPOM-Processor Arrays: A Framework for Parallel Data Processing
Jean-Paul Theis and Harald Schlimper, LG
Semicon R&D Center
Java Data Parallel Extensions with Runtime
System Support
Yuhong Wen, Bryan Carpenter, Geoffrey Fox,
and Guansong Zhang, Syracuse University
A General Distributed Event Model
Mani Chandy, California Institute of
Technology
Apportioning: A Technique for Efficient
Reachability Analysis of Concurrent Object-Oriented Programs
Sridhar Iyer, Indian Institute of Technology,
Guwahati, and S. Ramesh, Indian Institute of Technology, Mumbai
Efficient Address Sequence Generation for
Two-level Mappings in High Performance Fortran
J. Ramanujam, Arun Venkatachar, and Swaroop
Dutta, Louisiana State Universit
NOON - 1:30 PM
SESSION II-B
Communication and Routing
Chair: Denis Trystram, Domaine
Universitaire, France
Efficient Algorithms for Delay-bounded Minimum
Cost Path Problem in Communication Networks
Girish Kumar, Nishit Narang, and C.P.
Ravikumar, Indian Institute of Technology, New Delhi
Virtual Channel Multiplexing in Networks of
Workstations with Irregular Topology
F. Silla, J. Duato, Universidad Politecnica
de Valencia, A. Sivasubramaniam, and C.R. Das, Pennsylvania State University
One to All Broadcast in Hyper Butterfly Networks
Wei Shi and Pradip K. Srimani, Colorado State
University
Broadcasting on a Budget in the Multi-Service
Communication Model
Gene Itkis, NDS Technologies Israel, Ilan
Newman, Haifa University, and Assaf Schuster, Technion
Parallel Algorithms for Vehicle Routing Problems
K. Jeevan Madhu and Sanjeev Saxena, Indian
Institute of Technology, Kanpur
Global Reactive Congestion Control in
Multicomputer Networks
A.-H. Smai and L.-E. Thorelli, Royal
Institute of Technology
3:00 PM - 4:00 PM
KEYNOTE ADDRESS
Data-centric Program Restructuring
Keshav Pingali
Cornell University
4:30 PM - 6:00 PM
PANEL
Killer Applications Driving Future Architectures
Moderator:
Anant Agarwal, MIT
Panelists:
Arvind, MIT
Andrew A. Chien, University of California,
San Diego
Joseph A. Fisher, Hewlett-Packard
Charles Leiserson, MIT
Keshav Pingali, Cornell University
N. Radhakrishnan, US Army
Guri Sohi, University of Wisconsin
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
8:30 AM - 9:30 AM
KEYNOTE ADDRESS
Custom-Fit Processors
Joseph A. Fisher
Hewlett-Packard Laboratories
10:00 AM - 11:30
AM
INDUSTRIAL TRACK
SESSION I
TBA
NOON - 1:30 PM
INDUSTRIAL TRACK
SESSION II
TBA
3:00 PM - 4:00 PM
KEYNOTE ADDRESS
Technologies for Building a Teraflop Windows NT Cluster
Andrew A. Chien
University of California, San Diego and
National Center for Supercomputing
Applications
University of Illinois at Urbana-Champaign
4:30 PM - 6:30 PM
POSTER SESSION
Chair: Prith Banerjee, Northwestern
University
7:00
PM
CONFERENCE BANQUET AND CULTURAL PROGRAM
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
8:30 AM - 9:30 AM
KEYNOTE ADDRESS
Recent Trends in Networking Including ATM and Its Traffic Management
Raj Jain
The Ohio State University
10:00 AM - 11:30
AM
SESSION III-A
System Software
Chair: Sunil Prabhakar, University of
California, Santa Barbara, USA
A Simple Mechanism to Deal With Sequential Code
in Dataflow Architectures
Marcos Antonio Cavenaghi, State University of
Sao Paulo, Gonzalo Travieso, and
Alvaro Garcia Neto, University of Sao Paulo
Available Parallelism with Data Value Prediction
Rahul Sathe and Manoj Franklin, Clemson
University
Execution Characteristics of Object Oriented
Programs on the UltraSPARC-II
R. Radhakrishnan and L. John, University of
Texas at Austin
Memory Bank Disambiguation Using Modulo
Unrolling for RAW Machines
Rajeev Barua, Walter Lee, Saman Amarasinghe,
and Anant Agarwal, Massachusetts Institute of Technology
Control Flow Prediction with Unbalanced
Tree-like Subgraphs
Brian R. Toone and Manoj Franklin, Clemson
University
Message Passing Support on StarT-Voyager
Boon S. Ang, Derek Chiou, Larry Rudolph, and
Arvind, Massachusetts Institute of Technology
10:00 AM - 11:30
AM
SESSION III-B
Interconnection Networks
Chair: Chi-Hung Chi, National University
of Singapore, Singapore
Performance Analysis of Wavelength Converters in
WDM Wavelength Routed Optical Networks
K.R. Venugopal, E. Ezhil Rajan, and P.
Sreenivasa Kumar, Indian Institute of Technology, Chennai
On-line Diagnosibility of Baseline
Interconnection Network
S. Das (Bit), Bengal Engineering College, and
A. Chaudhuri, Jadavpur University
Distributed Routing Balancing for
Interconnection Network Communication
D. Franco, I. Garces, and E. Luque,
Universitat Autonoma de Barcelona
On Topology and Bisection Bandwidth of
Hierarchical-ring Networks for Shared-memory Multiprocessors
Govindan Ravindran and Michael Stumm,
University of Toronto
Permutation Admissibility in Shuffle-Exchange
Networks with Arbitrary Number of Stages
Nabanita Das, Bhargab B. Bhattacharya, Indian
Statistical Institute, Calcutta, Sergei L. Bezrukov, University of Paderborn, and Rekha
Menon,
Indian Statistical Institute, Calcutta
A Clustering Approach in Characterization of
Interconnection Networks
Wai Hong Ho and Timothy Mark Pinkston,
University of Southern California
The Augmented Composite Banyan Network
Hyoung-Il Lee, Seung-Woo Seo, and Tse-yun
Feng, Seoul National University
NOON - 1:30 PM
SESSION IV-A
Scheduling and Load Balancing
Chair: Timothy M. Pinkston, University of
Southern California, USA
GLB: A Low-Cost Scheduling Algorithm for
Distributed-Memory Architectures
Andrei Radulescu and Arjan J.C. van Gemund,
Delft University of Technology
Processor Allocation Using User Directives in
Mesh-Connected Multicomputer Systems
Chung-yen Chang and Prasant Mohapatra,
Iowa State University
Near Optimal Algorithms for Scheduling
Independent Chains in BSP
Alfredo Goldman, Gregory Mounie, and
Denis Trystram, Domaine Universitaire
How to Improve Local Load Balancing Policies by
Distorting Load Information
Franco Zambonelli, Universita di Modena
Dynamic Load Balancing Schemes for Computing
Accessible Surface Areas of Protein Molecules
Edward Suh, National Institutes of Health,
Bhagirath Narahari, George Washington University, and Rahul Simha, College of William and
Mary
Modulo-Variable Expansion Sensitive Scheduling
Madhavi Gopal Valluri and R. Govindarajan,
Indian Institute of Science
NOON - 1:30 PM
SESSION IV-B
Databases and I/O
Chair: Subhash Bhalla, The University of
Aizu, Japan
Selection Algorithms for Parallel Disk Systems
Sanguthevar Rajasekaran, University of
Florida
Hierarchical Architecture for Parallel Query
Processing on Networks of Workstations
Boquan Xie and Sivarama P. Dandamudi,
Carleton University
Extended Collective I/O for Efficient Retrieval
of Large Objects
Sachin More and Alok Choudhary, Northwestern
University
Skew-Insensitive Parallel Algorithms for
Relational Join
Khaled Alsabti, Syracuse University, and
Sanjay Ranka, University of Florida
Efficient Retrieval of Multidimensional Datasets
Through Parallel I/O
S. Prabhakar, University of California, Santa
Barbara, K. Abdel-Ghaffar, University of California,
Davis, D. Agrawal and A. El Abbadi,
University of California, Santa Barbara
An Improved Parallel Disk Scheduling Algorithm
Mahesh Kallahalla and Peter J. Varman, Rice
University
Measurement-Based Modeling and Analysis
Methodology for Characterizing Parallel I/O Performance
S. Sharma and R.K. Iyer, University of
Illinois at Urbana-Champaign
3:00 PM - 4:00 PM
KEYNOTE ADDRESS
Critical Issues in Design and Implementation of Interconnects for Workstation Clusters
José Duato
Departamento de Informatica de Sistemas y
Computadores
Universidad Politecnica de Valencia
4:30 PM - 6:00 PM
SESSION V-A
Distributed Systems
Chair: Sanjeev Saxena, Indian Institute of
Technology, Kanpur, India
Multiple Token Distributed Loop Local Area
Networks: Analysis
Nimmagadda Chalamaiah and Badrinath
Ramamurthy, Indian Institute of Technology, Kharagpur
Executing Serializable Transactions within a
Hard Real-time Database System
Subhash Bhalla, The University of Aizu
Performance-driven Design and Redesign of
High-speed Local Area Networks
C.P. Ravikumar, Indian Institute of
Technology, New Delhi, Dilip R. Pandit, Tata Elxsi (India) Ltd., and Anubhav Mishra,
Hughes Software Systems Ltd.
Testing Concurrency and Communication in
Distributed Objects
Adnan Bader, A.S.M. Sajeev, and Sita
Ramakrishnan, Monash University
A Conservative Parallel Simulation Algorithm for
Entity-Oriented Modeling
Chu-Cheow Lim, Yoke-Hean Low, Boon-Pin Ooi,
Gintic Institute of Manufacturing Technology
A Comparative Study of Some Network Subsystem
Organizations
Dmitry V. Ponomarev and Kanad Ghose, State
University of New York, Binghamton
4:30 PM - 6:00 PM
SESSION V-B
Applications
Chair: Sharad Gavali, NASA, USA
An Efficient Implementation of a Progressive
Image Transmission System using Successive Pruning Algorithm on a Parallel Architecture
S. Venkatesh and S. Srinivasan, Indian
Institute of Technology, Chennai
A Hybrid
Programming Model for Improving the Scalability of the Parallel GCM - T80 Code
T.N. Venkatesh, Rajalakshmy Sivaramakrishnan,
V.R. Sarasamma, and U.N. Sinha, National Aerospace Laboratories
Strategies for Parallel Implementation of a
Global Spectral Atmospheric General Circulation Model
Ravi S. Nanjundiah, Indian Institute of
Science, and Ian T. Foster, Argonne National Laboratory
Piecewise Fixed-Rate Retrieval Scheme for
Variable Bit Rate Video
Sunghoon Son and Kern Koh, Seoul National
University
Exploiting Image Processing Locality in Cache
Pre-fetching
R. Cucchiara and M. Piccardi, University of
Ferrara
WADE: A Web-based Automated Parallel CAD Environment
Dhruva R. Chakrabarti, Pramod G. Joisha,
Northwestern University, John A. Chandy, Sierra Vista Research, Dilip Krishnaswamy, Venkat
Krishnaswamy, Intel Corporation, and Prithviraj Banerjee, Northwestern University
Acknowledgments |
Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
8:30 AM - NOON
TUTORIAL 1
High
Performance Data Mining
Vipin Kumar, University of Minnesota
Mahesh Joshi, University of Minnesota
Audience: Graduate students, professionals
working in an industry which has to deal with high volumes of data, and anybody who is interested in getting a head start in the field of high performance data mining. The intended level of presentation is 35% beginner, 35% intermediate, 30% advanced.
Course Description: The last decade has seen an explosive growth in database technology and the amount of data collected. This has created an unprecedented opportunity for "data mining", which is a process of efficient supervised or unsupervised discovery of interesting information hidden in the data. Some of the common tasks in data mining are classification, discovery of association rules, and clustering. First part of this tutorial will provide an overview of what these tasks are and what are the algorithms used to accomplish them. Due to the huge size of data and amount of computation involved in data mining algorithms, parallel processing is often considered an essential component
for a successful data mining solution. The second part of the tutorial will present high performance parallel formulations of the algorithms used for classification based on decision trees and discovery of association rules. The tutorial will also draw
parallels between algorithms used for data mining and high performance scientific computing.
Lecturers: Vipin Kumar is currently a Professor of Computer Science at the University of Minnesota. His current research focuses on parallel computing and data mining.
Mahesh Joshi is currently pursuing his PhD in Computer Science at the University of Minnesota. His research interests include parallel scientific computing and high performance data mining.
8:30 AM - NOON
TUTORIAL 2
Mobile
Wireless Communication and Computing
Sajal K. Das, University of North Texas,
Denton
Audience: This tutorial is intended for computer professionals, telecommunication engineers, researchers, educators, and graduate students interested in the state-of-the-art topics in the cutting-edge technology of cellular mobile communication and computing.
Course Description: The field of mobile computing builds on wireless communication, architecture and networks; heterogeneous distributed systems; information management and application development. We will first introduce various fundamental concepts in wireless communications such as cellular architecture, PCS, TDMA, CDMA, bandwidth
management, and handoff. Then we will discuss solutions to various mobility-induced problems like mobile file management, location management and prediction, mobile inter-networking, disconnections handling, data security, and so on. Finally, we will present current research and technology to support quality of service (QoS) in wireless multimedia applications and mobile IP for next generation wireless networks.
Lecturer: Sajal K. Das is a Full Professor of Computer Sciences and also the Director of the Center for Research in Wireless Computing at the University of North Texas, Denton. He received his BS in 1983 from Calcutta University, ME in 1985 from the Indian Institute of Science, and PhD in 1988 from University of the Central Florida at Orlando, all in computer science.
8:30 AM - NOON
TUTORIAL 3
Java
Programming and Compilation
Milind Girkar, Microcomputer Research
Labs, Intel Corporation
Audience: Application and system programmers, compiler writers, anybody interested in high performance Java. Assumed knowledge about object oriented languages, code generation techniques.
Course Description: Java was introduced as a programming language for the internet in May 1995 by Sun Microsystems. This tutorial will introduce some of the main features of Java (classes, inheritance, interfaces, exceptions, threading, applets) through examples. Java programs are compiled into Java bytecode and run on the Java Virtual Machine. The tutorial will cover the architecture and the bytecode instruction set of the Java Virtual Machine. To improve performance of Java programs, Java bytecode is often Just-In-Time compiled into native machine code. The tutorial will present an approach for doing JIT compilation and touch upon many issues in the implementation of Java language features.
Lecturer: Milind Girkar received his PhD at the University of Illinois at Urbana-Champaign. Currently, he is a senior software engineer in Intel's Microcomputer Research Labs. His research interests are in parallelizing and optimizing compilers.
1:30 PM - 5:00 PM
TUTORIAL 4
High-Performance
I/O Systems: From Architectures to Applications
Alok Choudhary, Northwestern University
Audience: Researchers, students and industry people with the basic knowledge of architectures and software. People working in the areas of applications or system software for distributed/parallel computing. Highly useful for beginners
and advanced users interested in information processing, multimedia and scientific domains. The intended level of presentation is 35% Beginner, 45% Intermediate, 20% Advanced.
Course Description: Large-scale computing includes many application areas with intensive I/O demands, including scientific computing, databases, mining, decision support, and multimedia. For high-performance, it is critical to improve I/O performance of these applications. There are many solutions at different levels to address I/O performance problems. This tutorial presents architecture and software issues in designing scalable and efficient parallel I/O systems as well as I/O requirements, characteristics and examples from application domains of science and engineering, databases and multimedia systems.
Lecturer: Alok Choudhary is on the Electrical and Computer Engineering Faculty at Northwestern University. Alok Choudhary received the National Science Foundation's Young Investigator Award in 1993 (1993-1999). He has also received an IBM Faculty Development award and an Intel Research Council award.
1:30 PM - 5:00 PM
TUTORIAL 5
Architectural
and Design Implications of Mediaprocessing
Pradeep K. Dubey, IBM Solutions Research
Centre, New Delhi, India
Audience: Students, academics, and professionals interested in system/processor design implications of multimedia processing, as well as multimedia application developers interested in processor/ system level application tuning.
Course Description: The recent surge of interest in programmable mediaprocessing is unprecedented. It has the potential of radically altering the nature and needs of "general-purpose" processing. Consequently, almost every general purpose processor architecture has been modified to better perform multimedia applications, and a host of mediaprocessors have surfaced claiming significantly superior cost-performance tradeoff. This tutorial will explain the basics of programmable mediaprocessing from the point of view of a processor architect and designer. A brief description of various emerging/ projected multimedia scenarios will be followed by a detailed discussion of various architectural and design implications. We will conclude with performance analysis of selected kernels, tasks, and scenarios. Discussion of these topics will include comparative examples from various mediaprocessing platforms, including SPARC/VIS, Intel/MMX, PA-RISC/MAX, MIPS/MDMX, Chromatics/Mpact, Philips/Trimedia, MicroUnity, and PowerPC/AltiVec. The information will solely be based on published reports of these platforms.
Lecturer:
Pradeep K. Dubey is a Research Staff Member at the IBM Solutions Research Centre, New
Delhi, India, where he is now working on topics related to multimedia applications and
embedded systems. He has previously worked at IBM T. J. Watson Research Center, Yorktown
Heights, New York, and at Intel Corporation, Santa Clara, California. He received a BS in
electronics and communication engineering from Birla Institute of Technology, India, an
MSEE from the University of Massachusetts at Amherst, and a PhD in electrical engineering
from Purdue University.
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
The venue of the meeting is the Taj Coromandel, a luxury 5 star hotel situated on Mahatma Gandhi Road, Nungambakkam.
The Taj
Coromandel
No. 17, Mahatma Gandhi Road, Nungambakkam
Chennai 600 034, India
Tel: +91-44-827-2827
Fax: +91-44-827-0060/825-7104
The airport is about 10 Kms from the hotel. The cost of the ride to or from the airport can vary, and a one-way taxi ride will cost around US $6 including tip. Since December is a busy time for travel in India, you may want to reserve your room in advance.
Chennai (formerly Madras) is the largest city in South India with over 5 million residents. It is the capital of the state of Tamil Nadu and is regarded as the modern day center of the Dravidian culture. Carnatic (South Indian)classical music and dance festivals are held annually during the month of December. Places of interest include Fort St. George which houses the Tamil Nadu legislature, the Marina which is the second largest beachfront in the world, the Government Museum and the National Art Gallery which have excellent collections from the ancient Dravidian civilization, the headquarters of The Theosophical Society, the Snake Park with over 500 species, the Kapaleeswarar temple in Mylapore that exemplifies Dravidian architecture, and the San Thome Cathedral containing the remains of St. Thomas the Apostle (Doubting Thomas). Chennai is also the capital of the South Indian film industry. About an hour from Chennai is Mahabalipuram (Mamallapuram), the old port city of the Pallava dynasty (circa 800 AD). Mahabalipuram is the site of exquisite sculptures and monolithic stone carvings from that era. Kancheepuram, the City of Thousand Temples, is about 80 Kms from Chennai. Many other places of historical,archeological, cultural and spiritual interest can be easily explored from Chennai.
Visa and Passports: All participants who are not citizens of India must obtain a valid visa from Indian Consulates or High Commissions. The procedure may take some time, check with your travel consultant in advance.
Currency: The currency is the Indian Rupee. The conversion rate at the time of this publication is 1 US $ to Rs. 42.00. Credit cards are accepted in most luxury hotels. The Reserve Bank of India may have certain restrictions on converting Rupees to other currencies. For details, check with an Indian Consulate or your travel consultant.
Time and Weather: The Indian Standard Time(IST) is 5 1/2 hours ahead of the Greenwich Mean Time(GMT) and is 13 1/2 hours ahead of the U. S. Pacific Standard Time(PST).
In December/January the weather is tropical with temperatures averaging about 32 degrees Celsius (approximately 90 degrees Fahrenheit) during the day and about 20 degrees Celsius (approximately 68 degrees Fahrenheit) during the night. Light clothing is recommended.
Travel: Most international carriers fly to India. Many of them fly into Chennai. Indian Airlines and several private airlines connect Chennai with major cities on a daily basis. It is advisable to make reservations early as travel is heavy during the months of December and January. The meeting does not endorse any travel agency, however, to assist international travelers a block of seats has been reserved. You may contact Globalink Travels in the Los Angeles area at +1 818-972-9525 for details.
Accommodation:
Information about hotel reservations will be posted on the Web at http://www.hipc.org/hipc98/
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
HiPC '98 ADVANCE REGISTRATION FORM
A single page version of this form can also be downloaded for printing from http://www.hipc.org/hipc98/regform.html
PLEASE PRINT:
Name (Last/Family, First, M.I.):
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PLEASE CIRCLE APPROPRIATE FEES:
Conference Registration
Fees: IEEE-Member
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US$/Rs.
US$/Rs.
US$/Rs.
Advance
Registration
300/12600
350/14700
250/10500
(until
November 15, 1998)
On-site Registration
Fees:
350/14700
400/16800
300/12600
The registration fee includes a copy of the proceedings, lunches, and refreshments on December 17, 18, and 19 and conference Banquet. Conference registration fee does not include participation in the tutorials. Tutorials are open to conference registrants only.
Tutorial Registration
Fees:
IEEE-Member Non-Member
Full-time Student
(Per
tutorial)
US$/Rs.
US$/Rs.
US$/Rs.
Advance
Registration
100/4200
125/5250
100/4200
(until
November 15, 1998)
On-site
Registration
125/5250
150/6300
125/5250
The tutorial registration fee includes participation in the tutorial, a copy of the tutorial notes and refreshments.
Tutorial 1 ___ Tutorial 2 ___ Tutorial 3 ___ Tutorial 4 ___ Tutorial 5 ___
Conference Registration Fee:
________________
Tutorial Registration
Fee: ________________
Total Amount
Enclosed: ________________
Bank/Institute issuing cheque: ________________
Cheque/Draft
Number: ________________
Payment must be enclosed. Please make cheques payable to International Conference on High Performance Computing. All cheques MUST be either in U.S. Dollars drawn on a U.S. Bank or in Indian Rs. drawn on an Indian bank. Sorry, we are unable to accept credit cards for payment of registration fees. Participants currently residing in India may pay in Indian Rs., all others (including NRIs) must pay in U.S. Dollars. Written requests for refunds must be received (by the appropriate Finance Co-Chair) no later than Nov. 25, 1998. Refunds are subject to a US $50 (Rs. 2100) processing fee. All no-show registrants will be charged in full. Registration after November 15, 1998 will be accepted on-site only. Please do not send this registration form to the General Co-Chairs or to the Program Chair.
Please mail to:
HiPC
'98 HiPC
'98
c/o Ajay
Gupta c/o A. K. P.
Nambiar
Computer Science
Department
Software Technology Parks of India
Western Michigan
University
Block III , KSSIDC Complex
Kalamazoo, MI 49008,
USA.
KEONICS
Electronics city, Hosur Road
Email: hipc98@cs.wmich.edu
Bangalore 561229, INDIA
Fax: +1 (616)
387-3999
Email: nambiar@stpb.soft.net
Participants currently residing in India are requested to send their completed registration form to Mr. Nambiar, all others are requested to send it to Professor Ajay Gupta.
Scholarships to a)
full time students and b) faculty at Indian academic institutions and to researchers at
Indian government establishments are available from agencies within India. For details
contact Prof. C. P. Ravikumar (email: rkumar@ee.iitd.ernet.in).
These scholarships are not available to participants from non-Indian institutions.
Acknowledgments | Organization | Overview | Thursday |
Friday | Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home
The venue of the meeting is the Taj Coromandel, a
luxury 5 star hotel situated on Mahatma Gandhi Road, Nungambakkam. A block of rooms has
been reserved at the Taj Coromandel and the Taj Connemara hotels for meeting participants.
There will be a shuttle running between the two hotels several times a day.
Please contact the hotels directly to make your reservations.
| Taj Coromandel | Taj Connemara |
| 17, Mahatma Gandhi Road | 2, Binny Road |
| Chennai 600 034 | Chennai 600 002 |
| Tel: +91-44-827-2827 | Tel: +91-44-852-0123 |
| Fax: +91-44-825-7104 | Fax: +91-44-852-3361 |
The deadline for making reservations for the blocked rooms is December 5th, 1998. Availability cannot be guaranteed after this date. Bookings need to be accompanied by a credit card number. All amendments and cancellations need to reach the hotel reservations by December 10th, 1998, failing which there will be a one night's charge to the credit card.
The rooms are available to HiPC '98 participants
at 20% off the rack rates. The discounted rates are listed below. The tax on the rooms is
20% of the rack rate plus 10% of the discounted rate. The rates given below are per room
per night.
| Taj Coromandel (*****) | Taj Connemara (*****) | |||
| Superior Room | US $ 155 + tax | Standard Room | US $ 110 + tax | |
| Club Room | US $ 210 + tax | Executive Room | US $ 135 + tax |
Superior Room includes breakfast at the Coffee Shop. The Club Room includes airport transfer, complimentary breakfast and welcome drink, enhanced amenities in the room (house wine, fruit basket, chocolates and flowers, electronic safe etc.), health club facilities, special check in and check out facilities and access to the exclusive CLUB LOUNGE.
Standard Room includes breakfast at the Coffee Shop. Executive Room includes breakfast and airport transfer in a limousine.
Information about other nearby hotels is listed
below. HiPC '98 does not have any arrangements with these hotels. The rates indicated are
for information purpose only. Contact the hotels for any updates and corrections.
| Name | Rating | Contact Information | Rates | Distance from HiPC '98 Venue |
| Hotel Savera | *** | 69, Radhakrishna Salai Chennai - 600 004 Tel: +91-44-827-4700 Fax: +91-44-827-3475 |
Single: US$ 74
+ 30% tax Double: US$ 89 + 30% tax |
4 miles |
Acknowledgments
| Organization | Overview | Thursday | Friday |
Saturday | Sunday
Tutorials | Local Info |
Registration Form | Hotel
Reservation | Table of Contents | HiPC '98 Home